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| 2009 | ||
|---|---|---|
| 2 | Rahul M. Badghare, Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rajendra M. Patrikar: Design of Low Power Parallel Multiplier. J. Low Power Electronics 5(1): 31-39 (2009) | |
| 2007 | ||
| 1 | Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rahul M. Badghare, Rajendra M. Patrikar: FPGA Implementation of Low Power Parallel Multiplier. VLSI Design 2007: 115-120 | |
| 1 | Raghavendra B. Deshmukh | [1] [2] |
| 2 | Sanjiv Kumar Mangal | [1] [2] |
| 3 | Rajendra M. Patrikar | [1] [2] |
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