Nabil Badereddine

	2011
12		Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Nabil Badereddine: Failure Analysis and Test Solutions for Low-Power SRAMs. Asian Test Symposium 2011: 459-460
11		Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling. DDECS 2011: 353-358
10		Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: On using address scrambling to implement defect tolerance in SRAMs. ITC 2011: 1-8
	2010
9		Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: A statistical simulation method for reliability analysis of SRAM core-cells. DAC 2010: 853-856
8		Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: Impact of Resistive-Bridging Defects in SRAM Core-Cell. DELTA 2010: 265-269
7		Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: Analysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes. European Test Symposium 2010: 132-137
6		Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: Setting test conditions for improving SRAM reliability. European Test Symposium 2010: 257
5		Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Pierre Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine: Detecting NBTI induced failures in SRAM core-cells. VTS 2010: 75-80
	2008
4		Nabil Badereddine, Zhanglei Wang, Patrick Girard, Krishnendu Chakrabarty, Arnaud Virazel, Serge Pravossoudovitch, Christian Landrault: A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction. J. Electronic Testing 24(4): 353-364 (2008)
	2006
3		Nabil Badereddine, Patrick Girard, Serge Pravossoudovitch, Christian Landrault, Arnaud Virazel, Hans-Joachim Wunderlich: Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing. VLSI-SoC 2006: 403-408
	2005
2		Nabil Badereddine, Patrick Girard, Arnaud Virazel, Serge Pravossoudovitch, Christian Landrault: Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives. PATMOS 2005: 540-549
1		Nabil Badereddine, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Christian Landrault: Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles. VLSI-SoC 2005: 267-281

Coauthor Index

1	Alberto Bosio	[5] [6] [7] [8] [9] [10] [11] [12]
2	Krishnendu Chakrabarty	[4]
3	Luigi Dilillo	[5] [6] [7] [8] [9] [10] [11] [12]
4	Renan Alves Fonseca	[5] [6] [7] [8] [9] [10]
5	Patrick Girard	[1] [2] [3] [4] [6] [7] [8] [9] [10] [11] [12]
6	Pierre Girard	[5]
7	Christian Landrault	[1] [2] [3] [4]
8	Serge Pravossoudovitch	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
9	Aida Todri (Aida Todri-Sanial)	[12]
10	Arnaud Virazel	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
11	Zhanglei Wang	[4]
12	Hans-Joachim Wunderlich	[3]
13	Leonardo Bonet Zordan	[11] [12]

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