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| 2010 | ||
|---|---|---|
| 3 | John D. Backes, Marc D. Riedel: Reduction of interpolants for logic synthesis. ICCAD 2010: 602-609 | |
| 2009 | ||
| 2 | Weikang Qian, John D. Backes, Marc D. Riedel: The Synthesis of Stochastic Circuits for Nanoscale Computation. IJNMC 1(4): 39-57 (2009) | |
| 2008 | ||
| 1 | John D. Backes, Brian Fett, Marc D. Riedel: The analysis of cyclic circuits with Boolean satisfiability. ICCAD 2008: 143-148 | |
| 1 | Brian Fett | [1] |
| 2 | Weikang Qian | [2] |
| 3 | Marc D. Riedel | [1] [2] [3] |
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