![]() | ![]() |
| 2010 | ||
|---|---|---|
| 2 | Jürgen Pille, Dieter F. Wendel, Otto Wagner, Rolf Sautter, Wolfgang Penth, Thomas Fröhnel, Stefan Büttner, Otto A. Torreiter, Martin Eckert, Jose Paredes, David Hrusecky, David Ray, Miles Canada: A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor. ISSCC 2010: 344-345 | |
| 2006 | ||
| 1 | Nicolas Mäding, Jens Leenstra, Juergen Pille, Rolf Sautter, Stefan Büttner, S. Ehrenreich, W. Haller: The vector fixed point unit of the synergistic processor element of the cell architecture processor. DATE Designers' Forum 2006: 244-248 | |
| 1 | Miles Canada | [2] |
| 2 | Martin Eckert | [2] |
| 3 | S. Ehrenreich | [1] |
| 4 | Thomas Fröhnel | [2] |
| 5 | W. Haller | [1] |
| 6 | David Hrusecky | [2] |
| 7 | Jens Leenstra | [1] |
| 8 | Nicolas Mäding | [1] |
| 9 | Jose Paredes | [2] |
| 10 | Wolfgang Penth | [2] |
| 11 | Juergen Pille (Jürgen Pille) | [1] [2] |
| 12 | David Ray | [2] |
| 13 | Rolf Sautter | [1] [2] |
| 14 | Otto A. Torreiter | [2] |
| 15 | Otto Wagner | [2] |
| 16 | Dieter F. Wendel | [2] |
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