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Rodolfo Jardim de Azevedo
List of publications from the DBLP Bibliography Server - FAQ
| 2011 | ||
|---|---|---|
| 29 | João Moreira, Felipe Klein, Alexandro Baldassin, Paulo Centoducatte, Rodolfo Azevedo, Sandro Rigo: Using multiple abstraction levels to speedup an MPSoC virtual platform simulator. International Symposium on Rapid System Prototyping 2011: 99-105 | |
| 2010 | ||
| 28 | Felipe Klein, Alexandro Baldassin, João Moreira, Paulo Centoducatte, Sandro Rigo, Rodolfo Azevedo: STM versus lock-based systems: an energy consumption perspective. ISLPED 2010: 431-436 | |
| 2009 | ||
| 27 | Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo Candido Xavier, Ricardo Pannain, Paulo Centoducatte, Rodolfo Jardim de Azevedo: SPARC16: A New Compression Approach for the SPARC Architecture. SBAC-PAD 2009: 169-176 | |
| 26 | Felipe Klein, Alexandro Baldassin, Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo: On the energy-efficiency of software transactional memory. SBCCI 2009 | |
| 25 | Alexandro Baldassin, Felipe Klein, Guido Araujo, Rodolfo Azevedo, Paulo Centoducatte: Characterizing the Energy Consumption of Software Transactional Memory. Computer Architecture Letters 8(2): 56-59 (2009) | |
| 24 | Felipe Klein, Roberto Leao, Guido Araujo, Luiz C. V. dos Santos, Rodolfo Azevedo: A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization. IEEE Trans. VLSI Syst. 17(5): 660-673 (2009) | |
| 23 | Ricardo Santos, Rafael Batistella, Rodolfo Azevedo: A pattern based instruction encoding technique for high performance architectures. IJHPSA 2(2): 71-80 (2009) | |
| 2008 | ||
| 22 | Felipe Goldstein, Alexandro Baldassin, Paulo Centoducatte, Rodolfo Azevedo, Leonardo A. G. Garcia: A Software Transactional Memory System for an Asymmetric Processor Architecture. SBAC-PAD 2008: 175-182 | |
| 21 | Ricardo Santos, Rodolfo Azevedo, Guido Araujo: Instruction Scheduling Based on Subgraph Isomorphism for a High Performance Computer Processor. J. UCS 14(21): 3465-3480 (2008) | |
| 2007 | ||
| 20 | Fernando Kronbauer, Alexandro Baldassin, Bruno Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo: A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. IEEE International Workshop on Rapid System Prototyping 2007: 123-129 | |
| 19 | Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos: A multi-model power estimation engine for accuracy optimization. ISLPED 2007: 280-285 | |
| 18 | Richard Maciel, Bruno Albertini, Sandro Rigo, Guido Araujo, Rodolfo Azevedo: A Methodology and Toolset to Enable SystemC and VHDL Co-simulation. ISVLSI 2007: 351-356 | |
| 17 | Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos: On the Limitations of Power Macromodeling Techniques. ISVLSI 2007: 395-400 | |
| 2006 | ||
| 16 | Ricardo Santos, Rodolfo Azevedo, Guido Araujo: 2D-VLIW: An Architecture Based on the Geometry of Computation. ASAP 2006: 87-94 | |
| 15 | Ricardo Santos, Rodolfo Azevedo, Guido Araujo: Exploiting dynamic reconfiguration techniques: the 2D-VLIW approach. IPDPS 2006 | |
| 2005 | ||
| 14 | Cristiano C. de Araujo, Edna Barros, Rodolfo Azevedo, Guido Araujo: Processor Centric Specification and Modelling of MPSoCs. FDL 2005: 303-315 | |
| 13 | Richard E. Billo, Rodolfo Azevedo, Guido Araujo, Paulo Centoducatte, Eduardo Wanderley Netto: Design of a decompressor engine on a SPARC processor. SBCCI 2005: 110-114 | |
| 12 | Guido Araujo, Edna Barros, Elmar U. K. Melcher, Rodolfo Azevedo, Karina R. G. da Silva, Bruno Prado, Manoel Eusebio de Lima: A SystemC-only design methodology and the CINE-IP multimedia platform. Design Autom. for Emb. Sys. 10(2-3): 181-202 (2005) | |
| 11 | Cristiano C. de Araujo, Millena Gomes, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Platform designer: An approach for modeling multiprocessor platforms based on SystemC. Design Autom. for Emb. Sys. 10(4): 253-283 (2005) | |
| 10 | Rodolfo Azevedo, Sandro Rigo, Marcus Bartholomeu, Guido Araujo, Cristiano C. de Araujo, Edna Barros: The ArchC Architecture Description Language and Tools. International Journal of Parallel Programming 33(5): 453-484 (2005) | |
| 2004 | ||
| 9 | Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Multi-profile based code compression. DAC 2004: 244-249 | |
| 8 | Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. DATE 2004: 734-735 | |
| 7 | Edson Borin, Felipe Klein, Nahri Moreano, Rodolfo Azevedo, Guido Araujo: Fast instruction set custornization. ESTImedia 2004: 53-58 | |
| 6 | Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Multi-Profile Instruction Based Compression. SBAC-PAD 2004: 23-29 | |
| 5 | Sandro Rigo, Guido Araujo, Marcus Bartholomeu, Rodolfo Azevedo: ArchC: A SystemC-Based Architecture Description Language. SBAC-PAD 2004: 66-73 | |
| 4 | Marcus Bartholomeu, Rodolfo Azevedo, Sandro Rigo, Guido Araujo: Optimizations for Compiled Simulation Using Instruction Type Information. SBAC-PAD 2004: 74-81 | |
| 2003 | ||
| 3 | Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Exploring Memory Hierarchy with ArchC. SBAC-PAD 2003: 2-9 | |
| 2001 | ||
| 2 | Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. CASES 2001: 141-148 | |
| 2000 | ||
| 1 | Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo, Ricardo Pannain: Expression-tree-based algorithms for code compression on embedded RISC architectures. IEEE Trans. VLSI Syst. 8(5): 530-533 (2000) | |
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