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Arnaldo P. Azevedo Filho
List of publications from the DBLP Bibliography Server - FAQ
| 2011 | ||
|---|---|---|
| 22 | Arnaldo Azevedo, Ben H. H. Juurlink: An Instruction to Accelerate Software Caches. ARCS 2011: 158-170 | |
| 21 | Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero: A Highly Scalable Parallel Implementation of H.264. T. HiPEAC 4: 111-134 (2011) | |
| 2010 | ||
| 20 | Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastian Isaza, Georgi Gaydadjiev: The SARC Architecture. IEEE Micro 30(5): 16-29 (2010) | |
| 19 | Arnaldo Azevedo, Ben H. H. Juurlink: A Multidimensional Software Cache for Scratchpad-Based Systems. IJERTCS 1(4): 1-20 (2010) | |
| 2009 | ||
| 18 | Arnaldo P. Azevedo Filho, Ben H. H. Juurlink: Scalar Processing Overhead on SIMD-Only Architectures. ASAP 2009: 183-190 | |
| 17 | Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez: Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418 | |
| 16 | M. Alvarez Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero: Scalability of Macroblock-level Parallelism for H.264 Decoding. ICPADS 2009: 236-243 | |
| 15 | Mauricio Alvarez, Alex Ramírez, Mateo Valero, Arnaldo Azevedo, Cor Meenderinck: Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA. RASI 6(1): 219-228 (2009) | |
| 14 | Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez: Parallel Scalability of Video Decoders. Signal Processing Systems 57(2): 173-194 (2009) | |
| 2008 | ||
| 13 | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink: Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture. DSD 2008: 189-194 | |
| 12 | Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez: Analysis of video filtering on the cell processor. ISCAS 2008: 488-491 | |
| 2007 | ||
| 11 | Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin: FPGA Prototyping Strategy for a H.264/AVC Video Decoder. IEEE International Workshop on Rapid System Prototyping 2007: 174-180 | |
| 10 | Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi: MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV. ISCAS 2007: 1617-1620 | |
| 9 | Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi: Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder. ISVLSI 2007: 445-446 | |
| 8 | Luciano Volcan Agostini, Arnaldo P. Azevedo Filho, Wagston T. Staehler, Vagner S. Rosa, Bruno Zatt, Ana Cristina M. Pinto, Roger Endrigo Carvalho Porto, Sergio Bampi, Altamiro Amadeu Susin: Design and FPGA Prototyping of a H.264/AVC Main Profile. J. Braz. Comp. Soc. 13(1): 25-36 (2007) | |
| 2006 | ||
| 7 | Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin: FPGA Design of A H.264/AVC Main Profile Decoder for HDTV. FPL 2006: 1-6 | |
| 6 | Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi: Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV. VLSI-SoC 2006: 52-57 | |
| 2005 | ||
| 5 | Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi: Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units. IEEE International Workshop on Rapid System Prototyping 2005: 255-257 | |
| 2004 | ||
| 4 | Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo: When reconfigurable architecture meets network-on-chip. SBCCI 2004: 216-221 | |
| 2003 | ||
| 3 | Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva: X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor. IPDPS 2003: 171 | |
| 2 | Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva: X4CP32: A New Parallel/Reconfigurable General-Purpose Processor. SBAC-PAD 2003: 260-268 | |
| 1 | Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva: A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32. SBCCI 2003: 225-230 | |
Colors in the list of coauthors
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