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David Ayers Coauthor index pubzone.org

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DBLP keys2010
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLStefan Rusu, Simon Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora: A 45 nm 8-Core Enterprise Xeon¯ Processor. J. Solid-State Circuits 45(1): 7-14 (2010)
2009
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLStefan Rusu, Simon Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli: A 45nm 8-core enterprise Xeon® processor. ISSCC 2009: 56-57
2005
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLQing K. Zhu, David Ayers: Power Grid Planning for Microprocessors and SOCS. ISQED 2005: 352-356
2003
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEd Grochowski, David Ayers, Vivek Tiwari: Microarchitectural dI/dt Control. IEEE Design & Test of Computers 20(3): 40-47 (2003)
2002
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEd Grochowski, David Ayers, Vivek Tiwari: Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation. HPCA 2002: 7-16

Coauthor Index

1Jonathan Chang [4] [5]
2Ed Grochowski [1] [2]
3Sailesh Kottapalli [4] [5]
4Harry Muljono [4] [5]
5Matt Ratta [4] [5]
6Stefan Rusu [4] [5]
7Jason Stinson [4] [5]
8Simon Tam [4] [5]
9Vivek Tiwari [1] [2]
10Raj Varada [4] [5]
11Sujal Vora [5]
12Qing K. Zhu [3]

Colors in the list of coauthors

Last update Sun May 27 04:04:01 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page