Manu Awasthi

	2012
7		Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viji Srinivasan: Efficient scrub mechanisms for error-prone emerging memories. HPCA 2012: 15-26
6		Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis: Managing Data Placement in Memory Systems with Multiple Memory Controllers. International Journal of Parallel Programming 40(1): 57-83 (2012)
	2011
5		Manu Awasthi, David W. Nellans, Rajeev Balasubramonian, Al Davis: Prediction Based DRAM Row-Buffer Management in the Many-Core Era. PACT 2011: 183-184
	2010
4		Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis: Micro-pages: increasing DRAM efficiency with locality-aware data placement. ASPLOS 2010: 219-230
3		Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis: Handling the problems and opportunities posed by multiple on-chip memory controllers. PACT 2010: 319-330
	2009
2		Manu Awasthi, Kshitij Sudan, Rajeev Balasubramonian, John B. Carter: Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches. HPCA 2009: 250-261
	2008
1		Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen Muralimanohar, Rajeev Balasubramonian: Scalable and reliable communication for hardware transactional memory. PACT 2008: 144-154

Coauthor Index

1	Rajeev Balasubramonian	[1] [2] [3] [4] [5] [6] [7]
2	John B. Carter	[2]
3	Niladrish Chatterjee	[4]
4	Al Davis (Alan L. Davis)	[3] [4] [5] [6]
5	Niti Madan	[1]
6	Naveen Muralimanohar	[1]
7	David W. Nellans	[3] [4] [5] [6]
8	Seth H. Pugsley	[1]
9	Bipin Rajendran	[7]
10	Manjunath Shevgoor	[7]
11	Vijayalakshmi Srinivasan (Viji Srinivasan)	[7]
12	Kshitij Sudan	[2] [3] [4] [6] [7]

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page