Snorre Aunet

	2011
41		Hans Kristian Otnes Berge, Amir Hasanbegovic, Snorre Aunet: Muller C-elements based on minority-3 functions for ultra low voltage supplies. DDECS 2011: 195-200
40		Snorre Aunet: On the reliability of ultra low voltage circuits built from minority-3 gates. ECCTD 2011: 540-543
39		Hans Kristian Otnes Berge, Snorre Aunet: Multi-objective optimization of minority-3 functions for ultra-low voltage supplies. ISCAS 2011: 2313-2316
38		Amir Hasanbegovic, Snorre Aunet: Low-power subthreshold to above threshold level shifters in 90 nm and 65 nm process. Microprocessors and Microsystems - Embedded Hardware Design 35(1): 1-9 (2011)
	2010
37		Snorre Aunet, Amir Hasanbegovic: Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS. DDECS 2010: 267-272
36		Hans Kristian Otnes Berge, Matthias W. Blesken, Snorre Aunet, Ulrich Rückert: Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach. ICECS 2010: 319-322
	2009
35		Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Snorre Aunet, Tuan Vu Cao, Ali Peiravi: Ultra Low Power Full Adder Topologies. ISCAS 2009: 3158-3161
34		Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Ali Peiravi, Snorre Aunet, Tuan Vu Cao: New subthreshold concepts in 65nm CMOS technology. ISQED 2009: 162-166
33		Snorre Aunet, Hans Kristian Otnes Berge: Statistical Simulations on Perceptron-Based Adders. Encyclopedia of Artificial Intelligence 2009: 1474-1481
32		Snorre Aunet: Synthetic Neuron Implementations. Encyclopedia of Artificial Intelligence 2009: 1555-1561
	2008
31		Håvard Pedersen Alstad, Snorre Aunet: Improving Circuit Security against Power Analysis Attacks with Subthreshold Operation. DDECS 2008: 12-13
30		Håvard Pedersen Alstad, Snorre Aunet: Three Subthreshold Flip-Flop Cells Characterized in 90 nm and 65 nm CMOS Technology. DDECS 2008: 8-11
29		Yngvar Berg, Omid Mirmotahari, Johannes Goplen Lomsdalen, Snorre Aunet: High Speed Ultra Low Voltage CMOS inverter. ISVLSI 2008: 122-127
28		Farshad Moradi, Dag T. Wisland, Snorre Aunet, Hamid Mahmoodi, Tuan Vu Cao: 65NM sub-threshold 11T-SRAM for ultra low voltage applications. SoCC 2008: 113-118
27		Snorre Aunet, Bengt Oelmann, P. A. Norseng, Yngvar Berg: Real-Time Reconfigurable Subthreshold CMOS Perceptron. IEEE Transactions on Neural Networks 19(4): 645-657 (2008)
26		Kristian Granhaug, Snorre Aunet: Improving Yield and Defect Tolerance in Subthreshold CMOS Through Output-Wired Redundancy. J. Electronic Testing 24(1-3): 157-163 (2008)
	2007
25		Yngvar Berg, Renè Jensen, Johannes Goplen Lomsdalen, Henning Gundersen, Snorre Aunet: Fault Tolerant CMOS Logic Using Ternary Gates. ISMVL 2007: 38
24		Snorre Aunet, Hans Kristian Otnes Berge: Statistical Simulations for Exploring Defect Tolerance and Power Consumption for 4 Subthreshold 1-Bit Addition Circuits. IWANN 2007: 455-462
23		Jon Alfredsson, Snorre Aunet: Performance of CMOS and Floating-Gate Full-Adders Circuits at Subthreshold Power Supply. PATMOS 2007: 536-545
22		Jon Alfredsson, Snorre Aunet, Bengt Oelmann: Small Fan-in Floating-Gate Circuits with Application to an Improved Adder Structure. VLSI Design 2007: 314-317
	2006
21		Valeriu Beiu, Jabulani Nyathi, Snorre Aunet, Mawahib H. Sulieman: Femto Joule Switching for Nano Electronics. AICCSA 2006: 415-423
20		Kristian Granhaug, Snorre Aunet: Six Subthreshold Full Adder Cells Characterized in 90 nm CMOS Technology. DDECS 2006: 27-32
19		Kristian Granhaug, Snorre Aunet: Improving Yield and Defect Tolerance in Multifunction Subthreshold CMOS Gates. DFT 2006: 20-28
18		Kristian Granhaug, Snorre Aunet, Tor Sverre Lande: Body-bias regulator for ultra low power multifunction CMOS gates. ISCAS 2006
17		Yngvar Berg, Omid Mirmotahari, Snorre Aunet: Pseudo Floating-Gate Inverter with Feedback Control. VLSI-SoC 2006: 272-277
	2005
16		Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Asbjørn Djupdal: On the Advantages of Serial Architectures for Low-Power Reliable Computations. ASAP 2005: 276-281
15		Valeriu Beiu, Artur Zawadski, Razvan Andonie, Snorre Aunet: Using Kolmogorov Inspired Gates for Low Power Nanoelectronics. IWANN 2005: 438-445
14		Valeriu Beiu, Asbjørn Djupdal, Snorre Aunet: Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures. IWANN 2005: 486-493
	2004
13		Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari: Basic Multiple-Valued Functions Using Recharge CMOS Logic. ISMVL 2004: 346-351
	2003
12		Snorre Aunet, Morten Hartmann: Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware. ICES 2003: 365-376
11		Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin: Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. ISCAS (1) 2003: 345-348
10		Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin: Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. ISCAS (5) 2003: 193-196
9		Snorre Aunet, Yngvar Berg: UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3". IWANN (2) 2003: 57-64
8		Snorre Aunet, Yngvar Berg, Trond Sæther: Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. IEEE Transactions on Neural Networks 14(5): 1244-1256 (2003)
7		Snorre Aunet, Yngvar Berg, Trond Sæther: Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". IEEE Transactions on Neural Networks 14(6): 1582 (2003)
	2002
6		Yngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin: A novel floating-gate multiple-valued CMOS full-adder. ISCAS (1) 2002: 877-880
5		Yngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin: Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ISCAS (5) 2002: 385-388
4		Trond Ytterdal, Snorre Aunet: Compact low-voltage self-calibrating digital floating-gate CMOS logic circuits. ISCAS (5) 2002: 393-396
	2001
3		Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin: Extreme low-voltage floating-gate CMOS transconductance amplifier. ISCAS (1) 2001: 37-40
2		Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin: Floating-gate CMOS differential analog inverter for ultra low-voltage applications. ISCAS (1) 2001: 9-12
1		Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin: Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. ISCAS (4) 2001: 838-841

Coauthor Index

1	Jon Alfredsson	[22] [23]
2	Håvard Pedersen Alstad	[30] [31]
3	Razvan Andonie	[15]
4	Valeriu Beiu	[14] [15] [16] [21]
5	Yngvar Berg	[1] [2] [3] [5] [6] [7] [8] [9] [10] [11] [13] [17] [25] [27] [29]
6	Hans Kristian Otnes Berge	[24] [33] [36] [39] [41]
7	Matthias W. Blesken	[36]
8	Tuan Vu Cao	[28] [34] [35]
9	Asbjørn Djupdal	[14] [16]
10	Kristian Granhaug	[18] [19] [20] [26]
11	Henning Gundersen	[3] [25]
12	O. Hagen	[6]
13	Morten Hartmann	[12]
14	Amir Hasanbegovic	[37] [38] [41]
15	Mats Erling Høvin (Mats Høvin)	[1] [2] [3] [5] [6] [10] [11]
16	Renè Jensen	[5] [25]
17	Tor Sverre Lande	[18]
18	Johannes Goplen Lomsdalen	[11] [25] [29]
19	Hamid Mahmoodi (Hamid Mahmoodi-Meimand)	[28] [34] [35]
20	Omid Mirmotahari	[10] [13] [17] [29]
21	Farshad Moradi	[28] [34] [35]
22	Øivind Næss	[1] [2] [3] [5] [6] [11] [13]
23	P. A. Norseng	[27]
24	Jabulani Nyathi	[16] [21]
25	Bengt Oelmann	[22] [27]
26	Ali Peiravi	[34] [35]
27	Ulrich Rückert	[36]
28	Ray Robert Rydberg III	[16]
29	Trond Sæther	[7] [8]
30	Mawahib H. Sulieman	[21]
31	Dag T. Wisland	[28] [34] [35]
32	Trond Ytterdal	[4]
33	Artur Zawadski	[15]

Colors in the list of coauthors

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