 | 2012 |
|---|
| 7 |       | Georgios Panagopoulos,
Charles Augustine,
Kaushik Roy:
A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach.
DATE 2012: 1443-1446 |
| 2010 |
|---|
| 6 | | Farshad Moradi,
Charles Augustine,
Ashish Goel,
Georgios Karakonstantis,
Tuan Vu Cao,
Dag T. Wisland,
Hamid Mahmoodi,
Kaushik Roy:
Data-dependant sense-amplifier flip-flop for low power applications.
CICC 2010: 1-4 |
| 5 | | Georgios Karakonstantis,
Charles Augustine,
Kaushik Roy:
A self-consistent model to estimate NBTI degradation and a comprehensive on-line system lifetime enhancement technique.
IOLTS 2010: 3-8 |
| 2009 |
|---|
| 4 | | Charles Augustine,
Behtash Behin-Aein,
Xuanyao Fong,
Kaushik Roy:
A design methodology and device/circuit/architecture compatible simulation framework for low-power magnetic quantum cellular automata systems.
ASP-DAC 2009: 847-852 |
| 3 | | Charles Augustine,
Arijit Raychowdhury,
Yunfei Gao,
Mark S. Lundstrom,
Kaushik Roy:
PETE: A device/circuit analysis framework for evaluation and comparison of charge based emerging devices.
ISQED 2009: 80-85 |
| 2008 |
|---|
| 2 | | Jing Li,
Charles Augustine,
Sayeef S. Salahuddin,
Kaushik Roy:
Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement.
DAC 2008: 278-283 |
| 1 | | Nilanjan Banerjee,
Charles Augustine,
Kaushik Roy:
Fault-Tolerance with Graceful Degradation in Quality: A Design Methodology and Its Application to Digital Signal Processing Systems.
DFT 2008: 323-331 |
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