Ehsan Atoofian

	2012
16		Ehsan Atoofian: ArTA: Adaptive Granularity in Transactional Applications. PDP 2012: 74-80
15		Ehsan Atoofian, Amir Ghanbari Bavarsad: AGC: adaptive global clock in software transactional memory. PMAM 2012: 11-16
	2011
14		Ehsan Atoofian: Speculative Contention Avoidance in Software Transactional Memory. IPDPS Workshops 2011: 1417-1423
	2008
13		Ehsan Atoofian, Amirali Baniasadi, Yvonne Coady: Adaptive Read Validation in Time-Based Software Transactional Memory. Euro-Par Workshops 2008: 152-162
12		Ehsan Atoofian, Amirali Baniasadi: Exploiting program cyclic behavior to reduce memory latency in embedded processors. SAC 2008: 1482-1486
11		Ehsan Atoofian, Amirali Baniasadi: Using supplier locality in power-aware interconnects and caches in chip multiprocessors. Journal of Systems Architecture - Embedded Systems Design 54(5): 507-518 (2008)
	2007
10		Kaveh Aasaraai, Amirali Baniasadi, Ehsan Atoofian: Computational and storage power optimizations for the O-GEHL branch predictor. Conf. Computing Frontiers 2007: 105-112
9		Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai: Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols. Conf. Computing Frontiers 2007: 259-266
8		Ehsan Atoofian, Amirali Baniasadi: A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors. IPDPS 2007: 1-8
7		Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai: Exploiting Speculation Cost Prediction in Power-Aware Applications. J. Low Power Electronics 3(1): 43-53 (2007)
6		Ehsan Atoofian, Amirali Baniasadi: Speculative trivialization point advancing in high-performance processors. Journal of Systems Architecture 53(9): 587-601 (2007)
	2006
5		Ehsan Atoofian, Zainalabedin Navabi: A Test Approach for Look-Up Table Based FPGAs. J. Comput. Sci. Technol. 21(1): 141-146 (2006)
	2005
4		Ehsan Atoofian, Amirali Baniasadi: Improving Energy-Efficiency by Bypassing Trivial Computations. IPDPS 2005
3		Mohammad Alisafaee, Safar Hatami, Ehsan Atoofian, Zainalabedin Navabi, Ali Afzali-Kusha: A low-power scan-path architecture. ISCAS (5) 2005: 5278-5281
	2003
2		Ehsan Atoofian, Zainalabedin Navabi: A BIST Architecture for FPGA Look-Up Table Testing Reduces Reconfigurations. Asian Test Symposium 2003: 84-89
1		Ehsan Atoofian, Zainalabedin Navabi: A Low Power BIST Architecture for FPGA Look-Up Table Testing. VLSI-SOC 2003: 394-397

Coauthor Index

1	Kaveh Aasaraai	[7] [9] [10]
2	Ali Afzali-Kusha	[3]
3	Mohammad Alisafaee	[3]
4	Amirali Baniasadi	[4] [6] [7] [8] [9] [10] [11] [12] [13]
5	Amir Ghanbari Bavarsad	[15]
6	Yvonne Coady	[13]
7	Safar Hatami	[3]
8	Zainalabedin Navabi	[1] [2] [3] [5]

Colors in the list of coauthors

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