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| 2011 | ||
|---|---|---|
| 2 | Antonio Artés, José Luis Ayala, Ashoka Visweswara Sathanur, Jos Huisken, Francky Catthoor: Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications. VLSI-SoC 2011: 136-141 | |
| 2000 | ||
| 1 | M. Angeles Losada, Gulay Tohumoglu, David Fraile, Antonio Artés: Multi-iteration wavelet zero-tree coding for image compression. Signal Processing 80(7): 1281-1287 (2000) | |
| 1 | José Luis Ayala (José L. Ayala) | [2] |
| 2 | Francky Catthoor | [2] |
| 3 | David Fraile | [1] |
| 4 | Jos Huisken | [2] |
| 5 | M. Angeles Losada | [1] |
| 6 | Ashoka Visweswara Sathanur | [2] |
| 7 | Gulay Tohumoglu (Gülay Tohumoglu) | [1] |
Colors in the list of coauthors
Last update Sat May 26 04:23:17 2012 CET by the DBLP Team —
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