Rajat Arora

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2005

3 Manan Syal, Rajat Arora, Michael S. Hsiao: Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults. ICCD 2005: 453-460

2004

2 Rajat Arora, Michael S. Hsiao: Enhancing SAT-based Bounded Model Checking using Sequential Logic Implications. VLSI Design 2004: 784-787

1 Rajat Arora, Michael S. Hsiao: Using Global Structural Relationships of Signals to Accelerate SAT-based Combinational Equivalence Checking. J. UCS 10(12): 1597-1628 (2004)

	2005
3		Manan Syal, Rajat Arora, Michael S. Hsiao: Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults. ICCD 2005: 453-460
	2004
2		Rajat Arora, Michael S. Hsiao: Enhancing SAT-based Bounded Model Checking using Sequential Logic Implications. VLSI Design 2004: 784-787
1		Rajat Arora, Michael S. Hsiao: Using Global Structural Relationships of Signals to Accelerate SAT-based Combinational Equivalence Checking. J. UCS 10(12): 1597-1628 (2004)

Coauthor Index

1 Michael S. Hsiao [1] [2] [3]

2 Manan Syal [3]

Last update Sat May 26 04:23:17 2012 CET by the DBLP Team —

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