 | 2010 |
| 5 |  | Erwan Le Roux,
Nicola Scolari,
Budhaditya Banerjee,
Claude Arm,
Patrick Volet,
Daniel Sigg,
Pascal Heim,
Jean-Félix Perotto,
François Kaess,
Nicolas Raemy,
Alexandre Vouilloz,
David Ruffieux,
Matteo Contaldo,
Frédéric Giroud,
Daniel Séverac,
Marc Morgan,
Steve Gyger,
Cedric Monneron,
Thanh-Chau Le,
Cesar Henzelin,
Vincent Peiris:
A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks.
ISSCC 2010: 464-465 |
| 2009 |
| 4 |  | Pierre-François Ruedi,
Pascal Heim,
Steve Gyger,
François Kaess,
Claude Arm,
Ricardo Caseiro,
Jean-Luc Nagel,
Silvio Todeschini:
An SoC combining a 132dB QVGA pixel array and a 32b DSP/MCU processor for vision applications.
ISSCC 2009: 46-47 |
| 2006 |
| 3 |  | Amre El-Hoiydi,
Claude Arm,
Ricardo Caseiro,
Stefan Cserveny,
Jean-Dominique Decotignie,
Christian C. Enz,
Frédéric Giroud,
Steve Gyger,
E. Leroux,
Thierry Melly,
Vincent Peiris,
F. Pengg,
P.-D. Pfister,
Nicolas Raemy,
A. Ribordy,
David Ruffieux,
Patrick Volet:
The ultra low-power wiseNET system.
DATE 2006: 971-976 |
| 2000 |
| 2 |  | Claude Arm,
Jean-Marc Masgonty,
Christian Piguet:
Double-Latch Clocking Scheme for Low-Power I.P. Cores.
PATMOS 2000: 217-224 |
| 1996 |
| 1 |  | Christian Piguet,
T. Schneider,
Jean-Marc Masgonty,
Claude Arm,
Serge Durand,
M. Stegers:
Low-Power Embedded Microprocessor Design.
EUROMICRO 1996: 600-605 |