Lawrence A. Arledge Jr.

	2005
3		G. Peter Fang, David C. Yeh, David T. Zweidinger, Lawrence A. Arledge Jr., Vinod Gupta: Fast, accurate MOS table model for circuit simulation using an unstructured grid and preserving monotonicity. ASP-DAC 2005: 1102-1106
	1990
2		Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern, Richard Burch, Lawrence A. Arledge Jr., Paul F. Cox: A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations. ICCAD 1990: 446-449
	1989
1		Jue-Hsien Chern, John T. Maeda, Lawrence A. Arledge Jr., Ping Yang: SIERRA: a 3-D device simulator for reliability modeling. IEEE Trans. on CAD of Integrated Circuits and Systems 8(5): 516-527 (1989)

Coauthor Index

1	Richard Burch	[2]
2	Jue-Hsien Chern	[1] [2]
3	Paul F. Cox	[2]
4	G. Peter Fang	[3]
5	Vinod Gupta	[3]
6	John T. Maeda	[1]
7	Kartikeya Mayaram	[2]
8	Ping Yang	[1] [2]
9	David C. Yeh	[3]
10	David T. Zweidinger	[3]

Colors in the list of coauthors

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