 | 2012 |
|---|
| 7 |       | Visvesh S. Sathe,
Srikanth Arekapudi,
Charles Ouyang,
Marios C. Papaefthymiou,
Alexander T. Ishii,
Samuel Naffziger:
Resonant clock design for a power-efficient high-volume x86-64 microprocessor.
ISSCC 2012: 68-70 |
| 6 | | Hugh McIntyre,
Srikanth Arekapudi,
Eric Busta,
Timothy Fischer,
Michael Golden,
Aaron Horiuchi,
Tom Meneghini,
Samuel Naffziger,
James Vinh:
Design of the Two-Core x86-64 AMD "Bulldozer" Module in 32 nm SOI CMOS.
J. Solid-State Circuits 47(1): 164-176 (2012) |
| 2011 |
|---|
| 5 | | Timothy Fischer,
Srikanth Arekapudi,
Eric Busta,
Carl Dietz,
Michael Golden,
Scott Hilker,
Aaron Horiuchi,
Kevin A. Hurd,
Dave Johnson,
Hugh McIntyre,
Samuel Naffziger,
James Vinh,
Jonathan White,
Kathryn Wilcox:
Design solutions for the Bulldozer 32nm SOI 2-core processor module in an 8-core CPU.
ISSCC 2011: 78-80 |
| 4 | | Michael Golden,
Srikanth Arekapudi,
James Vinh:
40-Entry unified out-of-order scheduler and integer execution unit for the AMD Bulldozer x86-64 core.
ISSCC 2011: 80-82 |
| 2005 |
|---|
| 3 | | Srikanth Arekapudi,
Echere Iroaga,
Boris Murmann:
A low-power distributed wide-band LNA in 0.18µm CMOS.
ISCAS (5) 2005: 5055-5058 |
| 2 | | Srikanth Arekapudi,
Shang-Tse Chuang,
Isaac Keslassy,
Nick McKeown:
Using Hardware to Configure a Load-Balanced Switch.
IEEE Micro 25(1): 70-78 (2005) |
| 2003 |
|---|
| 1 | | Srikanth Arekapudi,
Fei Xin,
Jinzheng Peng,
Ian G. Harris:
ATPG for Timing Errors in Globally Asynchronous Locally Synchronous Systems.
Journal of Circuits, Systems, and Computers 12(3): 305-332 (2003) |
Data released under the ODC-BY 1.0 license — See also our legal information page