 | 2011 |
|---|
| 9 |       | Rafael A. Arce-Nazario,
José R. Ortiz-Ubarri:
Enumeration of Costas Arrays Using GPUs and FPGAs.
ReConFig 2011: 462-467 |
| 2010 |
|---|
| 8 | | Rafael A. Arce-Nazario,
Edusmildo Orozco,
Dorothy Bollman:
Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm.
Int. J. Reconfig. Comp. 2010: (2010) |
| 2009 |
|---|
| 7 | | Rafael A. Arce-Nazario,
Edusmildo Orozco,
Dorothy Bollman:
A Systolic Array Based Architecture for Implementing Multivariate Polynomial Interpolation Tasks.
ReConFig 2009: 77-82 |
| 2008 |
|---|
| 6 | | Rafael A. Arce-Nazario,
Manuel Jiménez,
Domingo Rodríguez:
Architectural Model and Resource Estimation for Distributed Hardware Implementation of Discrete Signal Transforms.
ReConFig 2008: 103-108 |
| 5 | | Rafael A. Arce-Nazario,
Manuel Jiménez,
Domingo Rodríguez:
Mapping of Discrete Cosine Transforms onto Distributed Hardware Architectures.
Signal Processing Systems 53(3): 367-382 (2008) |
| 2007 |
|---|
| 4 | | Rafael A. Arce-Nazario,
Manuel Jiménez,
Domingo Rodríguez:
Algorithmic-level exploration of discrete signal transforms for partitioning to distributed hardware architectures.
IET Computers & Digital Techniques 1(5): 557-564 (2007) |
| 2006 |
|---|
| 3 | | Rafael A. Arce-Nazario,
Manuel Jiménez,
Domingo Rodríguez:
Effects of High-Level Discrete Signal Transform Formulations on Partitioning for Multi-FPGA Architectures.
FCCM 2006: 287-288 |
| 2 | | Rafael A. Arce-Nazario,
Manuel Jiménez,
Domingo Rodríguez:
High-Level Partitioning of Discrete Signal Transforms for Multi-FPGA Architectures.
FPL 2006: 1-4 |
| 2005 |
|---|
| 1 | | Robert F. Lembach,
Rafael A. Arce-Nazario,
Donald Eisenmenger,
Cory Wood:
A diagnostic method for detecting and assessing the impact of physical design optimizations on routing.
ISPD 2005: 2-6 |
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