 | 2011 |
|---|
| 8 |       | Mariano Aguirre-Hernandez,
Mónico Linares Aranda:
CMOS Full-Adders for Energy-Efficient Arithmetic Applications.
IEEE Trans. VLSI Syst. 19(4): 718-721 (2011) |
| 2010 |
|---|
| 7 | | Mónico Linares Aranda,
Ramon Báez,
Oscar Gonzalez Diaz:
Hybrid adders for high-speed arithmetic circuits: A comparison.
CCE 2010: 546-549 |
| 2004 |
|---|
| 6 | | Manuel Salim Maza,
Mónico Linares Aranda:
Analysis and verification of interconnected rings as clock distribution networks.
ACM Great Lakes Symposium on VLSI 2004: 312-315 |
| 5 |  | Fernando Mendoza-Hernandez,
Mónico Linares Aranda,
Víctor H. Champac Vilela:
An improved technique to increase noise-tolerance in dynamic digital circuits.
ISCAS (2) 2004: 489-492 |
| 4 | | Fernando Mendoza-Hernandez,
Mónico Linares Aranda,
Víctor H. Champac Vilela:
The noise immunity of dynamic digital circuits with technology scaling.
ISCAS (2) 2004: 493-496 |
| 3 | | Alejandro Martínez-Ramírez,
Alejandro Díaz-Sánchez,
Mónico Linares Aranda,
Javier Vega-Pineda:
An architecture for fractal image compression using quad-tree multiresolution.
ISCAS (2) 2004: 897-900 |
| 2 | | Daniel Pacheco Bautista,
Mónico Linares Aranda:
A low power and high speed CMOS Voltage-Controlled Ring Oscillator.
ISCAS (4) 2004: 752-755 |
| 2003 |
|---|
| 1 | | Manuel Salim Maza,
Mónico Linares Aranda:
Interconnected rings and oscillators as gigahertz clock distribution nets.
ACM Great Lakes Symposium on VLSI 2003: 41-44 |
Data released under the ODC-BY 1.0 license — See also our legal information page