Masao Aramoto

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2005

4 Kazutoshi Kobayashi, Masao Aramoto, Yoichi Yuyama, Akihiko Higuchi, Hidetoshi Onodera: A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing. ASP-DAC 2005: 619-622

3 Kazutoshi Kobayashi, Masao Aramoto, Hidetoshi Onodera: A Resource-Shared VLIW Processor for Low-Power On-Chip Multiprocessing in the Nanometer Era. IEICE Transactions 88-C(4): 552-558 (2005)

2004

2 Yoichi Yuyama, Masao Aramoto, Kazutoshi Kobayashi, Hidetoshi Onodera: An SoC architecture and its design methodology using unifunctional heterogeneous processor array. ASP-DAC 2004: 737-742

1 Yoichi Yuyama, Masao Aramoto, Kazutoshi Kobayashi, Hidetoshi Onodera: RTL/ISS co-modeling methodology for embedded processor using SystemC. ISCAS (5) 2004: 305-308

	2005
4		Kazutoshi Kobayashi, Masao Aramoto, Yoichi Yuyama, Akihiko Higuchi, Hidetoshi Onodera: A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing. ASP-DAC 2005: 619-622
3		Kazutoshi Kobayashi, Masao Aramoto, Hidetoshi Onodera: A Resource-Shared VLIW Processor for Low-Power On-Chip Multiprocessing in the Nanometer Era. IEICE Transactions 88-C(4): 552-558 (2005)
	2004
2		Yoichi Yuyama, Masao Aramoto, Kazutoshi Kobayashi, Hidetoshi Onodera: An SoC architecture and its design methodology using unifunctional heterogeneous processor array. ASP-DAC 2004: 737-742
1		Yoichi Yuyama, Masao Aramoto, Kazutoshi Kobayashi, Hidetoshi Onodera: RTL/ISS co-modeling methodology for embedded processor using SystemC. ISCAS (5) 2004: 305-308

Coauthor Index

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