 | 2012 |
| 19 |  | Stefan Wildermann,
Josef Angermeier,
Eugen Sibirko,
Jürgen Teich:
Placing Multimode Streaming Applications on Dynamically Partially Reconfigurable Architectures.
Int. J. Reconfig. Comp. 2012: (2012) |
| 2011 |
| 18 |  | Josef Angermeier,
Daniel Ziener,
Michael Glaß,
Jürgen Teich:
Stress-Aware Module Placement on Reconfigurable Devices.
FPL 2011: 277-281 |
| 17 |  | Tobias Ziermann,
Bernhard Schmidt,
Moritz Mühlenthaler,
Daniel Ziener,
Josef Angermeier,
Jürgen Teich:
An FPGA implementation of a threat-based strategy for Connect6.
FPT 2011: 1-4 |
| 16 |  | Josef Angermeier,
Daniel Ziener,
Michael Glaß,
Jürgen Teich:
Runtime stress-aware replica placement on reconfigurable devices under safety constraints.
FPT 2011: 1-6 |
| 15 |  | Josef Angermeier,
Eugen Sibirko,
Rolf Wanka,
Jürgen Teich:
Bitonic Sorting on Dynamically Reconfigurable Architectures.
IPDPS Workshops 2011: 314-317 |
| 2010 |
| 14 |  | Josef Angermeier,
Sándor P. Fekete,
Tom Kamphans,
Nils Schweer,
Jürgen Teich:
Virtual area management: Multitasking on dynamically partially reconfigurable devices.
IPDPS Workshops 2010: 1-4 |
| 13 |  | Josef Angermeier,
Stefan Wildermann,
Eugen Sibirko,
Jürgen Teich:
Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures.
ReConFig 2010: 91-96 |
| 12 |  | Ali Ahmadinia,
Josef Angermeier,
Sándor P. Fekete,
Tom Kamphans,
Dirk Koch,
Mateusz Majer,
Nils Schweer,
Jürgen Teich,
Christopher Tessars,
Jan van der Veen:
ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices.
Dynamically Reconfigurable Systems 2010: 199-221 |
| 11 |  | Josef Angermeier,
Christophe Bobda,
Mateusz Majer,
Jürgen Teich:
Erlangen Slot Machine: An FPGA-Based Dynamically Reconfigurable Computing Platform.
Dynamically Reconfigurable Systems 2010: 51-71 |
| 10 |  | Josef Angermeier,
Sándor P. Fekete,
Tom Kamphans,
Nils Schweer,
Jürgen Teich:
Maintaining Virtual Areas on FPGAs using Strip Packing with Delays
CoRR abs/1001.4493: (2010) |
| 9 |  | Sándor P. Fekete,
Tom Kamphans,
Nils Schweer,
Christopher Tessars,
Jan van der Veen,
Josef Angermeier,
Dirk Koch,
Jürgen Teich:
No-Break Dynamic Defragmentation of Reconfigurable
CoRR abs/1012.5330: (2010) |
| 2009 |
| 8 |  | Josef Angermeier,
Abdulazim Amouri,
Jürgen Teich:
General methodology for mapping iterative approximation algorithms to adaptive dynamically partially reconfigurable systems.
FPL 2009: 302-307 |
| 2008 |
| 7 |  | Josef Angermeier,
Ulrich Batzer,
Mateusz Majer,
Jürgen Teich,
Christopher Claus,
Walter Stechele:
Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System.
ARC 2008: 148-158 |
| 6 |  | Sándor P. Fekete,
Tom Kamphans,
Nils Schweer,
Christopher Tessars,
Jan van der Veen,
Josef Angermeier,
Dirk Koch,
Jürgen Teich:
No-break dynamic defragmentation of reconfigurable devices.
FPL 2008: 113-118 |
| 5 |  | Josef Angermeier,
Mateusz Majer,
Jürgen Teich,
Lars Braun,
Tobias Schwalb,
Philipp Graf,
Michael Hübner,
Jürgen Becker,
Enno Lübbers,
Marco Platzner,
Christopher Claus,
Walter Stechele,
Andreas Herkersdorf,
Markus Rullmann,
Renate Merker:
Fine grain reconfigurable architectures.
FPL 2008: 348 |
| 4 |  | Christopher Claus,
Walter Stechele,
Matthias Kovatsch,
Josef Angermeier,
Jürgen Teich:
A comparison of embedded reconfigurable video-processing architectures.
FPL 2008: 587-590 |
| 3 |  | Mateusz Majer,
Stefan Wildermann,
Josef Angermeier,
Stefan Hanke,
Jürgen Teich:
Co-design Architecture and Implementation for Point-Based Rendering on FPGAs.
IEEE International Workshop on Rapid System Prototyping 2008: 142-148 |
| 2 |  | Josef Angermeier,
Jürgen Teich:
Heuristics for scheduling reconfigurable devices with consideration of reconfiguration overheads.
IPDPS 2008: 1-8 |
| 2007 |
| 1 |  | Josef Angermeier,
Diana Göhringer,
Mateusz Majer,
Jürgen Teich,
Sándor P. Fekete,
Jan van der Veen:
The Erlangen Slot Machine - A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM - Eine Hardware-Plattform für interdisziplinäre Forschung im Bereich des dynamischen rekonfigurierbaren Rechnens).
it - Information Technology 49(3): 143- (2007) |