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| 2006 | ||
|---|---|---|
| 2 | Dac Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel: Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor. ASP-DAC 2006: 871-878 | |
| 2004 | ||
| 1 | Hans-Werner Anderson, Hans Kriese, Wolfgang Roesner, Klaus-Dieter Schubert: Configurable system simulation model build comprising packaging design data. IBM Journal of Research and Development 48(3-4): 367-378 (2004) | |
| 1 | Erwin Behnen | [2] |
| 2 | Mark Bolliger | [2] |
| 3 | Sanjay Gupta | [2] |
| 4 | Paul E. Harvey | [2] |
| 5 | H. Peter Hofstee | [2] |
| 6 | Charles R. Johns | [2] |
| 7 | James A. Kahle | [2] |
| 8 | Atsushi Kameyama | [2] |
| 9 | John M. Keaty | [2] |
| 10 | Hans Kriese | [1] |
| 11 | Bob Le | [2] |
| 12 | Sang Lee | [2] |
| 13 | Tuyen V. Nguyen | [2] |
| 14 | John G. Petrovick | [2] |
| 15 | Dac Pham | [2] |
| 16 | Mydung Pham | [2] |
| 17 | Juergen Pille (Jürgen Pille) | [2] |
| 18 | Stephen D. Posluszny | [2] |
| 19 | Mack W. Riley | [2] |
| 20 | Wolfgang Roesner | [1] |
| 21 | Klaus-Dieter Schubert | [1] |
| 22 | Joseph Verock | [2] |
| 23 | James D. Warnock | [2] |
| 24 | Steve Weitzel | [2] |
| 25 | Dieter F. Wendel | [2] |
Colors in the list of coauthors
Last update Sat May 26 04:23:17 2012 CET by the DBLP Team —
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