K. Anagnostopoulos

	2006
2		George Economakos, K. Anagnostopoulos: Bit level architectural exploration technique for the design of low power multipliers. ISCAS 2006
1		P. Bougas, A. Tsirikos, K. Anagnostopoulos, Isidoros Sideris, Kiamal Z. Pekmestzi: Segmentation based design of serial parallel multipliers. ISCAS 2006

Coauthor Index

1	P. Bougas	[1]
2	George Economakos	[2]
3	Kiamal Z. Pekmestzi	[1]
4	Isidoros Sideris	[1]
5	A. Tsirikos	[1]

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