Bharadwaj S. Amrutur

Bharadwaj Amrutur

	2012
40		Aparna Mandke Dani, Bharadwaj Amrutur, Y. N. Srikant, Chiranjib Bhattacharyya: TCP: Thread Contention Predictor for Parallel Programs. PDP 2012: 19-26
39		M. Pramod, Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur, K. N. Bhat, Praveen C. Ramamurthy: CMOS Gas Sensor Array Platform with Fourier Transform Based Impedance Spectroscopy. VLSI Design 2012: 173-178
38		Nandish Ashutosh Mehta, Bharadwaj Amrutur: Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor. IEEE Trans. VLSI Syst. 20(5): 892-901 (2012)
	2011
37		Siva Rama Krishna V., Bharadwaj Amrutur, Navakanta Bhat, Chakra Pani K., Sampath Srinivasan: Detection of Glycated Hemoglobin using 3-Aminophenylboronic Acid Modified Graphene Oxide. BIODEVICES 2011: 109-113
36		Rajath Vasudevamurthy, Pratap Kumar Das, Bharadwaj Amrutur: A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test. ISCAS 2011: 2035-2038
35		Kaushik Ghosal, S. A. Kannan, Bharadwaj Amrutur: A power scalable receiver front-end at 2.4 GHz. ISCAS 2011: 2765-2768
34		Aparna Mandke Dani, Bharadwaj Amrutur, Y. N. Srikant: Applying genetic algorithms to optimize the power in tiled SNUCA chip multicore architectures. SAC 2011: 1090-1091
33		Satyam Dwivedi, Bharadwaj Amrutur, Navakanta Bhat: Power Scalable Digital Baseband Architecture for IEEE 802.15.4. VLSI Design 2011: 30-35
32		Vikram Chaturvedi, Bharadwaj Amrutur: A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology. VLSI Design 2011: 328-333
31		Ajit Gupte, Bharadwaj Amrutur, Mahesh Mehendale, Ajit V. Rao, Madhukar Budagavi: Memory Bandwidth and Power Reduction Using Lossy Reference Frame Compression in Video Encoding. IEEE Trans. Circuits Syst. Video Techn. 21(2): 225-230 (2011)
30		Bharadwaj Amrutur, Pratap Kumar Das, Rajath Vasudevamurthy: 0.84 ps Resolution Clock Skew Measurement via Subsampling. IEEE Trans. VLSI Syst. 19(12): 2267-2275 (2011)
29		Rakesh Gnana David Jeyasingh, Navakanta Bhat, Bharadwaj S. Amrutur: Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique. IEEE Trans. VLSI Syst. 19(2): 295-304 (2011)
	2010
28		Nandish Ashutosh Mehta, Gururaj V. Naik, Bharadwaj S. Amrutur: In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits. ISLPED 2010: 259-264
27		Aparna Mandke Dani, Keshavan Varadarajan, Bharadwaj Amrutur, Y. N. Srikant: Accelerating multi-core simulators. SAC 2010: 2377-2382
26		Janakiraman Viraraghavan, Bharadwaj Amrutur, V. Visvanathan: Voltage and Temperature Aware Statistical Leakage Analysis Framework Using Artificial Neural Networks. IEEE Trans. on CAD of Integrated Circuits and Systems 29(7): 1056-1069 (2010)
25		M. Kiran Kumar Reddy, Bharadwaj S. Amrutur, Rubin A. Parekhji: False Error Vulnerability Study of On-line Soft Error Detection Mechanisms. J. Electronic Testing 26(3): 323-335 (2010)
	2009
24		Basavaraj Talwar, Shailesh Kulkarni, Bharadwaj Amrutur: Latency, Power and Performance Trade-Offs in Network-on-Chips by Link Microarchitecture Exploration. VLSI Design 2009: 163-168
23		Ajit Gupte, Bharadwaj Amrutur: Adaptive Global Elimination Algorithm for Low Power Motion Estimation. J. Low Power Electronics 5(1): 1-16 (2009)
22		K. Sreejith, Bharadwaj Amrutur, Ashok Balivada: A Workload Based Lookup Table for Minimal Power Operation Under Supply and Body Bias Control. J. Low Power Electronics 5(2): 173-184 (2009)
21		Ajit Gupte, Bharadwaj Amrutur: Adaptive Global Elimination Algorithm for Low Power Motion Estimation (J. Low Power Electronics 5: 1-16 (2009)). J. Low Power Electronics 5(2): 255-256 (2009)
	2008
20		Ajit Gupte, Bharadwaj Amrutur: An adaptive, feature-based low power motion estimation algorithm. ICME 2008: 1013-1016
19		M. Kiran Kumar Reddy, Bharadwaj S. Amrutur, Rubin A. Parekhji: False Error Study of On-line Soft Error Detection Mechanisms. IOLTS 2008: 53-58
18		Jagdish Nayayan Pandey, Bharadwaj Amrutur, Sudhir S. Kudva: Quadrature generation techniques for frequency multiplication based oscillators. ISCAS 2008: 440-443
17		Arvind Madan, Bharadwaj Amrutur: Power reduction in on-chip interconnection network by serialization. ISLPED 2008: 201-204
16		Kannan Aryaperumal Sankaragomathi, Manodipan Sahoo, Satyam Dwivedi, Bharadwaj S. Amrutur, Navakanta Bhat: Optimal power and noise allocation for analog and digital sections of a low power radio receiver. ISLPED 2008: 271-276
15		Mohammed Shareef I, Pradeep Nair, Bharadwaj Amrutur: Energy Reduction in SRAM using Dynamic Voltage and Frequency Management. VLSI Design 2008: 503-508
14		S. A. Kannan, N. S. Sreeram, Bharadwaj S. Amrutur: Unified Vdd - Vth Optimization Based DVFM Controller for a Logic Block. VLSI Design 2008: 509-514
13		Satish Anand Verkila, Siva Kumar Bondada, Bharadwaj S. Amrutur: A 100MHz to 1GHz, 0.35V to 1.5V Supply 256 x 64 SRAM Block Using Symmetrized 9T SRAM Cell with Controlled Read. VLSI Design 2008: 560-565
12		Janakiraman Viraraghavan, Bishnu Prasad Das, Bharadwaj Amrutur: Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization. VLSI Design 2008: 667-672
11		Bishnu Prasad Das, Janakiraman Viraraghavan, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind: Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. VLSI Design 2008: 685-691
10		Janakiraman Viraraghavan, Bharadwaj Amrutur, V. Visvanathan: Voltage and Temperature Scalable Logic Cell Leakage Models Considering Local Variations Based on Transistor Stacks. J. Low Power Electronics 4(3): 301-319 (2008)
	2007
9		R. G. Raghavendra, Bharadwaj Amrutur: Area efficient loop filter design for charge pump phase locked loop. ACM Great Lakes Symposium on VLSI 2007: 148-151
8		Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. N. Srikant: INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations. CASES 2007: 238-247
7		Kaushik Rajan, Ramaswamy Govindarajan, Bharadwaj Amrutur: Dynamic Cache Placement with Two-level Mapping to Reduce Conflict Misses. PACT 2007: 422
6		Jagdish Nayayan Pandey, Sudhir S. Kudva, Bharadwaj Amrutur: A Low Power Frequency Multiplication Technique for ZigBee Transciever. VLSI Design 2007: 150-155
5		K. R. Viveka, Abhilasha Kawle, Bharadwaj Amrutur: Low Power Pipelined TCAM Employing Mismatch Dependent Power Allocation Technique. VLSI Design 2007: 638-646
4		Satish Yada, Bharadwaj S. Amrutur, Rubin A. Parekhji: Modified Stability Checking for On-line Error Detection. VLSI Design 2007: 787-792
3		U. K. Vijay, Bharadwaj Amrutur: Continuous Time Sigma Delta Modulator Employing a Novel Comparator Architecture. VLSI Design 2007: 919-924
	2006
2		Rajesh Vivekanandham, Bharadwaj S. Amrutur, R. Govindarajan: A scalable low power issue queue for large instruction window processors. ICS 2006: 167-176
1		Keshavan Varadarajan, S. K. Nandy, Vishal Sharda, Bharadwaj Amrutur, Ravi R. Iyer, Srihari Makineni, Donald Newell: Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions. MICRO 2006: 433-442

Coauthor Index

1	N. V. Arvind	[11]
2	Ashok Balivada	[22]
3	Gaurab Banerjee	[39]
4	K. N. Bhat	[39]
5	Navakanta Bhat	[16] [29] [33] [37] [39]
6	Chiranjib Bhattacharyya (Chiru Bhattacharyya)	[40]
7	Siva Kumar Bondada	[13]
8	Madhukar Budagavi	[31]
9	Vikram Chaturvedi	[32]
10	Aparna Mandke Dani	[27] [34] [40]
11	Bishnu Prasad Das	[11] [12]
12	Pratap Kumar Das	[30] [36]
13	Satyam Dwivedi	[16] [33]
14	Kaushik Ghosal	[35]
15	R. Govindarajan (Ramaswamy Govindarajan)	[2] [7]
16	Ajit Gupte	[20] [21] [23] [31]
17	Mohammed Shareef I	[15]
18	Ravi R. Iyer (Ravishankar R. Iyer)	[1]
19	H. S. Jamadagni	[11]
20	Rakesh Gnana David Jeyasingh	[29]
21	Chakra Pani K.	[37]
22	S. A. Kannan	[14] [35]
23	Abhilasha Kawle	[5]
24	Sudhir S. Kudva	[6] [18]
25	Shailesh Kulkarni	[24]
26	Arvind Madan	[8] [17]
27	Srihari Makineni	[1]
28	Mahesh Mehendale	[31]
29	Nandish Ashutosh Mehta	[28] [38]
30	Rahul Nagpal	[8]
31	Gururaj V. Naik	[28]
32	Pradeep Nair	[15]
33	S. K. Nandy (Soumitra Kumar Nandy)	[1]
34	Donald Newell (Don Newell)	[1]
35	Jagdish Nayayan Pandey	[6] [18]
36	Rubin A. Parekhji	[4] [19] [25]
37	M. Pramod	[39]
38	R. G. Raghavendra	[9]
39	Kaushik Rajan	[7]
40	Praveen C. Ramamurthy	[39]
41	Ajit V. Rao	[31]
42	M. Kiran Kumar Reddy	[19] [25]
43	Manodipan Sahoo	[16]
44	Kannan Aryaperumal Sankaragomathi	[16]
45	Vishal Sharda	[1]
46	K. Sreejith	[22]
47	N. S. Sreeram	[14]
48	Y. N. Srikant	[8] [27] [34] [40]
49	Sampath Srinivasan	[37]
50	Basavaraj Talwar	[24]
51	Siva Rama Krishna V.	[37]
52	Keshavan Varadarajan	[1] [27]
53	Rajath Vasudevamurthy	[30] [36]
54	Satish Anand Verkila	[13]
55	U. K. Vijay	[3]
56	Janakiraman Viraraghavan	[10] [11] [12] [26]
57	V. Visvanathan	[10] [26]
58	K. R. Viveka	[5]
59	Rajesh Vivekanandham	[2]
60	Satish Yada	[4]

Colors in the list of coauthors

Last update Sat May 26 04:23:17 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page