Yoshihito Amemiya

	2011
43		Akira Kondou, Masayuki Ikebe, Junichi Motohisa, Yoshihito Amemiya, Eiichi Sano: A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C network. ICECS 2011: 326-329
42		Andrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya: Neuro-morphic Circuit Architectures Employing Temporal Noises and Device Fluctuations to Improve Signal-to-noise Ratio in a Single-electron Pulse-density Modulator. IJUC 7(1-2): 53-63 (2011)
	2010
41		Gessyca Maria Tovar, Tetsuya Asai, Yoshihito Amemiya: Array-Enhanced Stochastic Resonance in a Network of Noisy Neuromorphic Circuits. ICONIP (1) 2010: 188-195
40		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A 1-muhboxW 600- hboxppm/circhboxC Current Reference Circuit Consisting of Subthreshold CMOS Circuits. IEEE Trans. on Circuits and Systems 57-II(9): 681-685 (2010)
39		Shin'ichi Asai, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya: High-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair. IEICE Transactions 93-C(6): 741-746 (2010)
38		Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs. IEICE Transactions 93-C(6): 835-841 (2010)
37		Takaaki Hirai, Tetsuya Asai, Yoshihito Amemiya: A CMOS Phase-Shift oscillator Based on the conduction of Heat. Journal of Circuits, Systems, and Computers 19(4): 763-772 (2010)
	2009
36		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETs. ASP-DAC 2009: 95-96
35		Tomoki Iida, Tetsuya Asai, Eiichi Sano, Yoshihito Amemiya: Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers. ICECS 2009: 140-143
34		Andrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya: Exploiting Temporal Noises and Device Fluctuations in Enhancing Fidelity of Pulse-Density Modulator Consisting of Single-Electron Neural Circuits. ICONIP (2) 2009: 384-391
33		Andrew Kilinga Kikombo, Tetsuya Asai, Takahide Oya, Alexandre Schmid, Yusuf Leblebici, Yoshihito Amemiya: A pulse-density modulation circuit exhibiting noise shaping with single-electron neurons. IJCNN 2009: 1600-1605
32		Yusuke Tsugita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya, Tetsuya Hirose: On-chip PVT Compensation Techniques for Low-voltage CMOS Digital LSIs. ISCAS 2009: 1565-1568
31		Ken Ueno, Tetsuya Asai, Yoshihito Amemiya: Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIs. ISCAS 2009: 5-8
30		Andrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya: Pulse-Density Modulation with an Ensemble of Single-Electron Circuits Employing Neuronal Heterogeneity to Achieve High Temporal Resolution. NanoNet 2009: 51-56
29		Akira Utagawa, Tohru Sahashi, Tetsuya Asai, Yoshihito Amemiya: Stochastic Resonance in an Array of Locally-Coupled McCulloch-Pitts Neurons with Population Heterogeneity. IEICE Transactions 92-A(10): 2508-2513 (2009)
28		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques. IEICE Transactions 92-A(12): 3079-3081 (2009)
27		Taichi Ogawa, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits. IEICE Transactions 92-A(2): 436-442 (2009)
	2008
26		Gessyca Maria Tovar, Tetsuya Asai, Yoshihito Amemiya: Noise-Tolerant Analog Circuits for Sensory Segmentation Based on Symmetric STDP Learning. ICONIP (2) 2008: 851-858
25		Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock Distribution. IEICE Transactions 91-A(9): 2475-2481 (2008)
24		Kazuhito Yamada, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: On Digital LSI Circuits Exploiting Collision-Based Fusion Gates. IJUC 4(1): 45-59 (2008)
	2007
23		Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning. ICONIP (2) 2007: 117-126
22		Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning. IJCNN 2007: 897-901
21		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs. ISCAS 2007: 3748-3751
20		Andrew Kilinga Kikombo, Takahide Oya, Tetsuya Asai, Yoshihito Amemiya: Discrete Dynamical Systems Consisting of Single-electron Circuits. I. J. Bifurcation and Chaos 17(10): 3613-3617 (2007)
19		Motoyoshi Takahashi, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: A CMOS Reaction-diffusion Device Using Minority-Carrier Diffusion in Semiconductors. I. J. Bifurcation and Chaos 17(5): 1713-1719 (2007)
18		Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: An Inhibitory Neural-Network Circuit Exhibiting Noise Shaping with Subthreshold MOS Neuron Circuits. IEICE Transactions 90-A(10): 2108-2115 (2007)
17		Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Hatsuo Hayashi, Yoshihito Amemiya: A subthreshold CMOS circuit for a piecewise linear neuromorphic oscillator with current-mode low-pass filters. Neurocomputing 71(1-3): 3-12 (2007)
	2006
16		Tetsuya Asai, Taishi Kamiya, Tetsuya Hirose, Yoshihito Amemiya: A subthreshold Analog MOS Circuit for Lotka-volterra Chaotic oscillator. I. J. Bifurcation and Chaos 16(1): 207-212 (2006)
15		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy. IEICE Transactions 89-A(4): 902-907 (2006)
14		Yoshihito Amemiya: Single-Electron Logic Systems Based on a Graphical Representation of Digital Functions. IEICE Transactions 89-C(11): 1504-1511 (2006)
	2005
13		Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya: Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters. ISCAS (3) 2005: 1923-1926
12		Takahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici: Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture. ISCAS (3) 2005: 2535-2538
11		Takahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya: On the fault tolerance of a clustered single-electron neural network for differential enhancement. IEICE Electronic Express 2(3): 76-80 (2005)
10		Tetsuya Hirose, Toshimasa Matsuoka, Kenji Taniguchi, Tetsuya Asai, Yoshihito Amemiya: Ultralow-Power Current Reference Circuit with Low Temperature Dependence. IEICE Transactions 88-C(6): 1142-1147 (2005)
9		Tetsuya Asai, Masayuki Ikebe, Tetsuya Hirose, Yoshihito Amemiya: A quadrilateral-object composer for binary images with reaction-diffusion cellular automata. Parallel Algorithms Appl. 20(1): 57-67 (2005)
	2004
8		Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya: An analog CMOS chip implementing a CNN-based locomotion controller for quadruped walking robots. ISCAS (3) 2004: 1-4
7		Yusuke Kanazawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: A MOS circuit for bursting neural oscillators with excitable oregonators. IEICE Electronic Express 1(4): 73-76 (2004)
6		Hiroshi Matsubara, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya: Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata. IEICE Electronic Express 1(9): 248-252 (2004)
	2003
5		Tetsuya Asai, Yoshihito Amemiya: Biomorphic Analog Devices based on Reaction-Diffusion Systems. ISMVL 2003: 197-
4		Tetsuya Asai, Yusuke Kanazawa, Yoshihito Amemiya: A subthreshold MOS neuron circuit based on the Volterra system. IEEE Transactions on Neural Networks 14(5): 1308-1312 (2003)
3		Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya: An analog CMOS central pattern generator for interlimb coordination in quadruped locomotion. IEEE Transactions on Neural Networks 14(5): 1356-1365 (2003)
	2000
2		Tetsuya Asai, Masato Koutani, Yoshihito Amemiya: An Analog-Digital Hybrid CMOS Circuit for Two-Dimensional Motion Detection with Correlation Neural Networks. IJCNN (3) 2000: 494-499
	1998
1		Masayuki Ikebe, Masamichi Akazawa, Yoshihito Amemiya: nu-MOS cellular-automaton devices for intelligent image sensors. KES (3) 1998: 447-453

Coauthor Index

1	Masamichi Akazawa	[1]
2	Shin'ichi Asai	[39]
3	Tetsuya Asai	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42]
4	Eric Shun Fukuda	[22] [23]
5	Hatsuo Hayashi	[17]
6	Takaaki Hirai	[37]
7	Tetsuya Hirose	[6] [7] [9] [10] [15] [16] [17] [18] [19] [21] [22] [23] [24] [25] [27] [28] [32] [36] [38] [40]
8	Tomoki Iida	[35]
9	Masayuki Ikebe	[1] [9] [43]
10	Taishi Kamiya	[16]
11	Yusuke Kanazawa	[4] [7]
12	Andrew Kilinga Kikombo	[20] [30] [33] [34] [42]
13	Akira Kondou	[43]
14	Masato Koutani	[2]
15	Yusuf Leblebici	[11] [12] [33]
16	Hiroshi Matsubara	[6]
17	Toshimasa Matsuoka	[10]
18	Junichi Motohisa	[43]
19	Kazuki Nakada	[3] [8] [13] [17]
20	Taichi Ogawa	[27]
21	Takahide Oya	[11] [12] [20] [33]
22	Tohru Sahashi	[29]
23	Eiichi Sano	[35] [43]
24	Alexandre Schmid	[11] [12] [33]
25	Motoyoshi Takahashi	[19]
26	Kenji Taniguchi	[10]
27	Gessyca Maria Tovar	[22] [23] [26] [41]
28	Yusuke Tsugita	[32] [38]
29	Ken Ueno	[15] [21] [28] [31] [32] [36] [38] [39] [40]
30	Akira Utagawa	[18] [25] [29]
31	Kazuhito Yamada	[24]

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