Marco Antonio Zanata Alves

	2012
9		Eduardo Henrique Molina da Cruz, Marco Antonio Zanata Alves, Alexandre Carissimi, Philippe Olivier Alexandre Navaux, Christiane Pousa Ribeiro, Jean-François Méhaut: Memory-aware Thread and Data Mapping for Hierarchical Multi-core Platforms. IJNC 2(1): 97-116 (2012)
	2011
8		Eduardo Henrique Molina da Cruz, Marco Antonio Zanata Alves, Alexandre Carissimi, Philippe Olivier Alexandre Navaux, Christiane Pousa Ribeiro, Jean-François Méhaut: Using Memory Access Traces to Map Threads and Data on Hierarchical Multi-core Platforms. IPDPS Workshops 2011: 551-558
7		Mateus B. Rutzig, Antonio Carlos Schneider Beck, Felipe Lopes Madruga, Marco Antonio Zanata Alves, Henrique C. Freitas, Nicolas Maillard, Philippe Olivier Alexandre Navaux, Luigi Carro: Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment. Int. J. Reconfig. Comp. 2011: (2011)
6		Marco Antonio Zanata Alves, Henrique C. Freitas, Philippe Olivier Alexandre Navaux: High Latency and Contention on Shared L2-Cache for Many-Core Architectures. Parallel Processing Letters 21(1): 85-106 (2011)
	2010
5		Matthias Diener, Felipe Lopes Madruga, Eduardo Rocha Rodrigues, Marco Antonio Zanata Alves, Joerg Schneider, Philippe Olivier Alexandre Navaux, Hans-Ulrich Heiss: Evaluating Thread Placement Based on Memory Access Patterns for Multi-core Processors. HPCC 2010: 491-496
4		Mateus B. Rutzig, Felipe Lopes Madruga, Marco Antonio Zanata Alves, Henrique Cota de Freitas, Antonio Carlos Schneider Beck, Nicolas Maillard, Philippe Olivier Alexandre Navaux, Luigi Carro: TLP and ILP exploitation through a reconfigurable multiprocessor system. IPDPS Workshops 2010: 1-8
3		Henrique Cota de Freitas, Lucas Mello Schnorr, Marco Antonio Zanata Alves, Philippe Olivier Alexandre Navaux: Impact of Parallel Workloads on NoC Architecture Design. PDP 2010: 551-555
	2009
2		Henrique C. Freitas, Felipe Lopes Madruga, Marco Antonio Zanata Alves, Philippe Olivier Alexandre Navaux: Design of Interleaved Multithreading for Network Processors on Chip. ISCAS 2009: 2213-2216
1		Henrique C. Freitas, Marco Antonio Zanata Alves, Lucas Mello Schnorr, Philippe Olivier Alexandre Navaux: Performance Evaluation of NoC Architectures for Parallel Workloads. NOCS 2009: 87

Coauthor Index

1	Antonio Carlos Schneider Beck	[4] [7]
2	Alexandre Carissimi	[8] [9]
3	Luigi Carro	[4] [7]
4	Eduardo Henrique Molina da Cruz	[8] [9]
5	Matthias Diener	[5]
6	Henrique C. Freitas	[1] [2] [6] [7]
7	Henrique Cota de Freitas	[3] [4]
8	Hans-Ulrich Heiss (Hans-Ulrich Heiß)	[5]
9	Felipe Lopes Madruga	[2] [4] [5] [7]
10	Nicolas Maillard	[4] [7]
11	Jean-François Méhaut	[8] [9]
12	Philippe Olivier Alexandre Navaux	[1] [2] [3] [4] [5] [6] [7] [8] [9]
13	Christiane Pousa Ribeiro	[8] [9]
14	Eduardo Rocha Rodrigues	[5]
15	Mateus B. Rutzig	[4] [7]
16	Jörg Schneider (Joerg Schneider)	[5]
17	Lucas Mello Schnorr	[1] [3]

Last update Sat May 26 04:23:17 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page