Bartomeu Alorda

	2011
17		Bartomeu Alorda, Gabriel Torrens, Sebastiàn A. Bota, Jaume Segura: Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation. DATE 2011: 986-991
16		Bartomeu Alorda, Kay Suenaga, Pere Pons: Design and evaluation of a microprocessor course combining three cooperative methods: SDLA, PjBL and CnBL. Computers & Education 57(3): 1876-1884 (2011)
15		Bartomeu Alorda, Gabriel Torrens, Sebastiàn A. Bota, Jaume Segura: 8T vs. 6T SRAM cell radiation robustness: A comparative analysis. Microelectronics Reliability 51(2): 350-359 (2011)
	2010
14		Bartomeu Alorda, Gabriel Torrens, Sebastiàn A. Bota, Jaume Segura: Static and dynamic stability improvement strategies for 6T CMOS low-power SRAMs. DATE 2010: 429-434
13		Sebastiàn A. Bota, Gabriel Torrens, Bartomeu Alorda, J. Verd, Jaume Segura: Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories. IOLTS 2010: 141-146
12		Gabriel Torrens, Bartomeu Alorda, Salvador Barcelo, José Luis Rosselló, Sebastiàn A. Bota, Jaume Segura: Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination. IEEE Trans. on Circuits and Systems 57-II(4): 280-284 (2010)
	2009
11		Sebastiàn A. Bota, Gabriel Torrens, Bartomeu Alorda: Critical charge characterization in 6-T SRAMs during read mode. IOLTS 2009: 120-125
	2007
10		Bartomeu Alorda, Ivan de Paúl, Jaume Segura: Charge-based testing BIST for embedded memories. IET Computers & Digital Techniques 1(5): 481-490 (2007)
	2005
9		Bartomeu Alorda, Sebastiàn A. Bota, Jaume Segura: A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. IOLTS 2005: 177-182
	2004
8		Bartomeu Alorda, Vicens Canals, Ivan de Paúl, Jaume Segura: A BIST-based Charge Analysis for Embedded Memories. IOLTS 2004: 199-206
7		Bartomeu Alorda, Vincent Canals, Jaume Segura: A Two-Level Power-Grid Model for Transient Current Testing Evaluation. J. Electronic Testing 20(5): 543-552 (2004)
	2003
6		Bartomeu Alorda, Jaume Segura: An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing. IOLTS 2003: 178-182
5		Bartomeu Alorda, B. Bloechel, Ali Keshavarzi, Jaume Segura: CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing. ITC 2003: 719-726
	2002
4		Bartomeu Alorda, André Ivanov, Jaume Segura: An Off-Chip Sensor Circuit for On-Line Transient Current Testing. IOLTW 2002: 192
3		Bartomeu Alorda, M. Rosales, Jerry M. Soden, Charles F. Hawkins, Jaume Segura: Charge Based Transient Current Testing (CBT) for Submicron CMOS SRAMs. ITC 2002: 947-953
	2001
2		Ivan de Paúl, M. Rosales, Bartomeu Alorda, Jaume Segura, Charles F. Hawkins, Jerry M. Soden: Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments. VTS 2001: 286-291
	2000
1		Bartomeu Alorda, Ivan de Paúl, Jaume Segura, T. Miller: On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor. IOLTW 2000: 87-91

Coauthor Index

1	Salvador Barcelo	[12]
2	B. Bloechel	[5]
3	Sebastiàn A. Bota	[9] [11] [12] [13] [14] [15] [17]
4	Vicens Canals	[8]
5	Vicent Canals (Vincent Canals)	[7]
6	Charles F. Hawkins	[2] [3]
7	André Ivanov	[4]
8	Ali Keshavarzi	[5]
9	T. Miller	[1]
10	Ivan de Paúl	[1] [2] [8] [10]
11	Pere Pons	[16]
12	M. Rosales	[2] [3]
13	José Luis Rosselló	[12]
14	Jaume Segura	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12] [13] [14] [15] [17]
15	Jerry M. Soden	[2] [3]
16	Kay Suenaga	[16]
17	Gabriel Torrens	[11] [12] [13] [14] [15] [17]
18	J. Verd	[13]

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