 | 2011 |
|---|
| 7 |       | Alexandru Paler,
Armin Alaghi,
Ilia Polian,
John P. Hayes:
Tomographic Testing and Validation of Probabilistic Circuits.
European Test Symposium 2011: 63-68 |
| 2008 |
|---|
| 6 | | Armin Alaghi,
Mahshid Sedghi,
Naghmeh Karimi,
Mahmood Fathy,
Zainalabedin Navabi:
Reliable NoC architecture utilizing a robust rerouting algorithm.
EWDTS 2008: 200-203 |
| 5 | | Armin Alaghi,
Mahshid Sedghi,
Naghmeh Karimi,
Zainalabedin Navabi:
NoC Reconfiguration for Utilizing the Largest Fault-free Connected Sub-structure.
ITC 2008: 1 |
| 4 | | Mahshid Sedghi,
Elnaz Koopahi,
Armin Alaghi,
Mahmood Fathy,
Zainalabedin Navabi:
An NoC Test Strategy Based on Flooding with Power, Test Time and Coverage Considerations.
VLSI Design 2008: 409-414 |
| 3 | | Naghmeh Karimi,
Armin Alaghi,
Mahshid Sedghi,
Zainalabedin Navabi:
Online Network-on-Chip Switch Fault Detection and Diagnosis Using Functional Switch Faults.
J. UCS 14(22): 3716-3736 (2008) |
| 2007 |
|---|
| 2 | | Armin Alaghi,
Naghmeh Karimi,
Mahshid Sedghi,
Zainalabedin Navabi:
Online NoC Switch Fault Detection and Diagnosis Using a High Level Fault Mode.
DFT 2007: 21-30 |
| 2006 |
|---|
| 1 | | Mahnaz Sadoughi Yarandi,
Armin Alaghi,
Zainalabedin Navabi:
An Optimized BIST Architecture for FPGA Look-Up Table Testing.
ISVLSI 2006: 420-421 |
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