Nikolaos Alachiotis

	2012
14		Nikolaos Alachiotis, Vasilios I. Kelefouras, George Athanasiou, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis: A data locality methodology for matrix-matrix multiplication algorithm. The Journal of Supercomputing 59(2): 830-851 (2012)
	2011
13		Nikolaos Alachiotis, Alexandros Stamatakis: FPGA Optimizations for a Pipelined Floating-Point Exponential Unit. ARC 2011: 316-327
12		Nikolaos Alachiotis, Simon A. Berger, Alexandros Stamatakis: Accelerating Phylogeny-Aware Short DNA Read Alignment with FPGAs. FCCM 2011: 226-233
11		Nikolaos Alachiotis, Alexandros Stamatakis: FPGA Acceleration of the Phylogenetic Parsimony Kernel? FPL 2011: 417-422
10		Vasilios I. Kelefouras, George Athanasiou, Nikolaos Alachiotis, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis: A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization. IEEE Transactions on Signal Processing 59(12): 6217-6226 (2011)
9		Nikolaos Alachiotis, Alexandros Stamatakis: A Vector-Like Reconfigurable Floating-Point Unit for the Logarithm. Int. J. Reconfig. Comp. 2011: (2011)
	2010
8		Nikolaos Alachiotis, Simon A. Berger, Alexandros Stamatakis: Efficient PC-FPGA Communication over Gigabit Ethernet. CIT 2010: 1727-1734
7		Nikolaos Alachiotis, Alexandros Stamatakis: Efficient floating-point logarithm unit for FPGAs. IPDPS Workshops 2010: 1-8
6		Alexandros Stamatakis, Nikolaos Alachiotis: Time and memory efficient likelihood-based tree searches on phylogenomic alignments with missing data. Bioinformatics [ISMB] 26(12): 132-139 (2010)
5		Athanasios Milidonis, Nikolaos Alachiotis, Vasileios Porpodas, Harris E. Michail, George A. Panagiotakopoulos, Athanasios P. Kakarountas, Costas E. Goutis: Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy. Signal Processing Systems 59(3): 281-296 (2010)
	2009
4		Nikolaos Alachiotis, Alexandros Stamatakis, Euripides Sotiriades, Apostolos Dollas: A reconfigurable architecture for the Phylogenetic Likelihood Function. FPL 2009: 674-678
3		Nikolaos Alachiotis, Euripides Sotiriades, Apostolos Dollas, Alexandros Stamatakis: Exploring FPGAs for accelerating the phylogenetic likelihood function. IPDPS 2009: 1-8
2		Athanasios Milidonis, Vasileios Porpodas, Nikolaos Alachiotis, Athanasios P. Kakarountas, Harris E. Michail, George A. Panagiotakopoulos, Costas E. Goutis: Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. IET Computers & Digital Techniques 3(1): 109-123 (2009)
	2007
1		Athanasios Milidonis, Nikolaos Alachiotis, Vasileios Porpodas, Haralambos Michail, Athanasios Kakarountas, Constantinos E. Goutis: Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy. DATE 2007: 612-617

Coauthor Index

1	George Athanasiou	[10] [14]
2	Simon A. Berger	[8] [12]
3	Apostolos Dollas	[3] [4]
4	Constantinos E. Goutis (Costas E. Goutis)	[1] [2] [5] [10] [14]
5	Athanasios Kakarountas (Athanasios P. Kakarountas)	[1] [2] [5]
6	Vasilios I. Kelefouras	[10] [14]
7	Angeliki Kritikakou	[10] [14]
8	Haralambos Michail	[1]
9	Harris E. Michail	[2] [5] [10] [14]
10	Athanasios Milidonis	[1] [2] [5]
11	George A. Panagiotakopoulos	[2] [5]
12	Vasileios Porpodas	[1] [2] [5]
13	Euripides Sotiriades	[3] [4]
14	Alexandros Stamatakis	[3] [4] [6] [7] [8] [9] [11] [12] [13]

Colors in the list of coauthors

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