Asim J. Al-Khalili

A. J. Al-Khalili

	2012
43		Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria: Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures. IEEE Trans. VLSI Syst. 20(1): 29-41 (2012)
	2011
42		Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria: Repeater insertion in power-managed VLSI systems. ACM Great Lakes Symposium on VLSI 2011: 395-398
41		Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria: Activity management in battery-powered embedded systems: A case study of ZigBee® WSN. ICECS 2011: 727-731
40		Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria: Analysis of Resistive Open Defects in Drowsy SRAM Cells. J. Electronic Testing 27(2): 203-213 (2011)
	2010
39		Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria: An interconnect-aware Dynamic Voltage Scaling scheme for DSM VLSI. ISCAS 2010: 41-44
38		Ali M. Farhangi, Asim J. Al-Khalili, Dhamin Al-Khalili: Pattern-Driven Clock Tree Routing with Via Minimization. ISVLSI 2010: 216-221
37		Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan: Skew compensation in energy recovery clock distribution networks. IET Computers & Digital Techniques 4(1): 56-72 (2010)
36		Seyed Ebrahim Esmaeili, A. J. Al-Khalili, Glenn E. R. Cowan: Dual-edge triggered sense amplifier flip-flop for resonant clock distribution networks. IET Computers & Digital Techniques 4(6): 499-514 (2010)
	2009
35		Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria: An interconnect-aware delay model for dynamic voltage scaling in NM technologies. ACM Great Lakes Symposium on VLSI 2009: 45-50
34		Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria: Estimation of energy performance in computing platforms. ICECS 2009: 783-786
	2006
33		A. J. Al-Khalili: A CAD Tool for Scalable, Variable Architecture Floating-Point Adder Generator. AICCSA 2006: 74-79
32		Asim J. Al-Khalili: A CAD Tool for Generation of Synthesizable and Scalable Square of Binary Numbers. ICN/ICONS/MCL 2006: 183
31		Houman Zarrabi, Haydar Saaied, Asim J. Al-Khalili, Yvon Savaria: Zero skew differential clock distribution network. ISCAS 2006
	2005
30		Shaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy: An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction. IWSOC 2005: 396-399
29		Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili: Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1637-1643 (2005)
28		Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili: Delay analysis of CMOS gates using modified logical effort model. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 937-947 (2005)
	2004
27		Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili: Modulo deflation in (2n+1, 2n, 2n-1) converters. ISCAS (2) 2004: 429-432
	2003
26		Asim J. Al-Khalili, Aiping Hu: Design of a 32-bit squarer - exploiting addition redundancy. ISCAS (5) 2003: 325-328
25		Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili: Technology-portable analytical model for DSM CMOS inverter transition-time estimation. IEEE Trans. on CAD of Integrated Circuits and Systems 22(9): 1177-1187 (2003)
24		Cheng-Yu Pai, Asim J. Al-Khalili, William E. Lynch: Low-Power Constant-Coefficient Multiplier Generator. VLSI Signal Processing 35(2): 187-194 (2003)
	2002
23		Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili: Quadratic deferred-merge embedding algorithm for zero skew clock distribution network. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 119-125
	2001
22		R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah: A Low Power Approach to Floating Point Adder Design for DSP Applications. VLSI Signal Processing 27(3): 195-213 (2001)
	1999
21		R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili: Power implications of precision limited arithmetic in floating point FIR filters. ISCAS (1) 1999: 165-168
20		Adnan Kabbani, A. J. Al-Khalili: Dynamic CMOS noise immunity estimation in submicron regime. ISCAS (1) 1999: 529-532
19		Adnan Kabbani, A. J. Al-Khalili: Estimation of ground bounce effects on CMOS circuits. ISCAS (1) 1999: 533-536
18		R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili: An IEEE Compliant Floating Point MAF. VLSI 1999: 149-160
17		Jacob Augustine, William E. Lynch, Yuke Wang, Asim J. Al-Khalili: Lossy Compression of Images Using Logic Minimization. VLSI Design 1999: 538-543
	1998
16		R. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili: A Low Power Floating Point Accumulator. VLSI Design 1998: 330-
	1997
15		R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili: A Low Power Approach to Floating Point Adder Design. ICCD 1997: 178-185
14		R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili: Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition. ISLPED 1997: 235-238
	1996
13		R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili: Energy delay analysis of partial product reduction methods for parallel multiplier implementation. ISLPED 1996: 201-204
	1995
12		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Area efficient computing structures for concurrent error detection in systolic arrays. VLSI Signal Processing 10(3): 237-260 (1995)
11		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri, Dhamin Al-Khalili: Design techniques for fault-tolerant systolic arrays. VLSI Signal Processing 11(1-2): 151-168 (1995)
	1992
10		F. Rouatbi, Baher Haroun, Asim J. Al-Khalili: Power estimation tool for sub-micron CMOS VLSI circuits. ICCAD 1992: 204-209
9		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Design Methodology for Fault-Tolerant Systolic Array Architectures. ICPP (2) 1992: 267-274
	1991
8		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Area Efficient Computing Structures for Concurrent Error Detection in Systolic Architectures. ICPP (1) 1991: 484-491
7		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: On the Design of Optimal Fault-Tolerant Systolic Array Architecures. IPPS 1991: 352-357
6		R. V. Dantu, Nikitas J. Dimopoulos, R. V. Patel, A. J. Al-Khalili: Depth perception using blurring and its application in VLSI wafer probing. Mach. Vis. Appl. 5(1): 35-45 (1991)
	1990
5		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Design of optimal systolic arrays: a systematic approach. SPDP 1990: 166-173
4		Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili: A module generator for optimized CMOS buffers. IEEE Trans. on CAD of Integrated Circuits and Systems 9(10): 1028-1046 (1990)
	1989
3		Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili: A Module Generator for Optimized CMOS Buffers. DAC 1989: 245-250
	1984
2		Asim J. Al-Khalili: An Algorithm for an Intelligent Arabic Computer Terminal. International Journal of Man-Machine Studies 20(4): 331-341 (1984)
	1973
1		C. J. Macleod, Asim J. Al-Khalili: An On-Line Optimization Procedure for an Urban Traffic System. Optimization Techniques 1973: 31-41

Coauthor Index

1	Dhamin Al-Khalili	[3] [4] [11] [13] [14] [15] [16] [18] [21] [22] [23] [25] [28] [29] [38]
2	Jacob Augustine	[17]
3	Shaoqiang Bi	[27] [30]
4	Glenn E. R. Cowan	[36] [37]
5	R. V. Dantu	[6]
6	Nikitas J. Dimopoulos	[6]
7	Seyed Ebrahim Esmaeili	[36] [37]
8	Michael Ogbonna Esonu	[5] [7] [8] [9] [11] [12]
9	Ali M. Farhangi	[37] [38]
10	Warren J. Gross	[30]
11	Salim Hariri	[5] [7] [8] [9] [11] [12]
12	Baher Haroun	[10]
13	Aiping Hu	[26]
14	Adnan Kabbani	[19] [20] [25] [28]
15	William E. Lynch	[17] [24]
16	C. J. Macleod	[1]
17	Mohamed Nekili	[23] [29]
18	Afshin Nourivand	[40] [43]
19	Cheng-Yu Pai	[24]
20	R. V. Patel	[6]
21	R. V. K. Pillai	[13] [14] [15] [16] [18] [21] [22]
22	F. Rouatbi	[10]
23	Haydar Saaied	[23] [29] [31]
24	Yvon Savaria	[31] [34] [35] [39] [40] [41] [42] [43]
25	S. Y. A. Shah	[22]
26	M. N. S. Swamy	[30]
27	Yuke Wang	[17]
28	Wei Wang	[27] [30]
29	Houman Zarrabi	[31] [34] [35] [39] [41] [42]
30	Yong Zhu	[3] [4]

Colors in the list of coauthors

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