Sami Ajram

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2007

2 Régis Roubadia, Sami Ajram, Guy Cathébras: Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology. ISCAS 2007: 2490-2493

2006

1 Régis Roubadia, Sami Ajram, Guy Cathébras: Low Power and Low Jitter Wideband Clock Synthesizers in CMOS ASICs. PATMOS 2006: 458-467

	2007
2		Régis Roubadia, Sami Ajram, Guy Cathébras: Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology. ISCAS 2007: 2490-2493
	2006
1		Régis Roubadia, Sami Ajram, Guy Cathébras: Low Power and Low Jitter Wideband Clock Synthesizers in CMOS ASICs. PATMOS 2006: 458-467

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