![]() | ![]() |
| 2005 | ||
|---|---|---|
| 2 | Toshiki Kanamoto, Tetsuya Watanabe, Mitsutoshi Shirota, Masayuki Terai, Tatsuya Kunikiyo, Kiyoshi Ishikawa, Yoshihide Ajioka, Yasutaka Horiba: A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures. IEICE Transactions 88-A(12): 3463-3470 (2005) | |
| 1987 | ||
| 1 | Masayuki Terai, Yoshihide Ajioka, T. Noda, Masaru Ozaki, T. Umeki, Koji Sato: Symbolic Layout System: Application Results and Functional Improvements. IEEE Trans. on CAD of Integrated Circuits and Systems 6(3): 346-354 (1987) | |
| 1 | Yasutaka Horiba | [2] |
| 2 | Kiyoshi Ishikawa | [2] |
| 3 | Toshiki Kanamoto | [2] |
| 4 | Tatsuya Kunikiyo | [2] |
| 5 | T. Noda | [1] |
| 6 | Masaru Ozaki | [1] |
| 7 | Koji Sato | [1] |
| 8 | Mitsutoshi Shirota | [2] |
| 9 | Masayuki Terai | [1] [2] |
| 10 | T. Umeki | [1] |
| 11 | Tetsuya Watanabe | [2] |
Data released under the ODC-BY 1.0 license — See also our legal information page