Ali Ahmadinia

	2011
49		Ali Ahmadinia, Hernando Fernandez-Canque, Roberto Ramirez-Iniguez: Dynamic Reconfiguration in JPEG2000 Hardware Architecture. KES (3) 2011: 453-461
48		Roberto Ramirez-Iniguez, Ali Ahmadinia, Hernando Fernandez-Canque: DTIRC Based Optical Collimators. KES (3) 2011: 462-471
47		Hernando Fernandez-Canque, Sorin Hintea, Roberto Ramirez-Iniguez, Ali Ahmadinia, Gabor Csipkes, Doris Csipkes: Machine Vision Applied to Highly Variable Objects. KES (3) 2011: 472-482
46		Michael Opoku Agyeman, Ali Ahmadinia: Optimising Heterogeneous 3D Networks-on-Chip. PARELEC 2011: 25-30
45		Ali Shahrabi, Ali Ahmadinia: An Efficient Router Architecture for Network on Chip. PECCS 2011: 405-412
44		Ali Ahmadinia, Alireza Shahrabi: A Highly Adaptive and Efficient Router Architecture for Network-on-Chip. Comput. J. 54(8): 1295-1307 (2011)
43		Ali Ahmadinia, Hernando Fernandez-Canque: Optimization of reconfigurable multi-core system-on-chips for multi-standard applications. KES Journal 15(2): 89-98 (2011)
42		Michael Opoku Agyeman, Ali Ahmadinia: Power and area optimisation in heterogeneous 3D networks-on-chip architectures. SIGARCH Computer Architecture News 39(4): 106-107 (2011)
	2010
41		Ali Ahmadinia, Alireza Shahrabi: Adaptive Router Architecture for Optimising Quality of Service in Networks-on-Chip. CIT 2010: 1796-1801
40		Ali Ahmadinia, Josef Angermeier, Sándor P. Fekete, Tom Kamphans, Dirk Koch, Mateusz Majer, Nils Schweer, Jürgen Teich, Christopher Tessars, Jan van der Veen: ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices. Dynamically Reconfigurable Systems 2010: 199-221
39		Balal Ahmad, Ali Ahmadinia, Tughrul Arslan: High level modeling and automated generation of heterogeneous SoC architectures with optimized custom reconfigurable cores and on-chip communication media. Journal of Systems Architecture - Embedded Systems Design 56(11): 597-615 (2010)
	2009
38		Hernando Fernandez-Canque, Sorin Hintea, John Freer, Ali Ahmadinia: Machine Vision Application to Automatic Intruder Detection Using CCTV. KES (2) 2009: 498-505
37		Ali Ahmadinia, Tughrul Arslan, Hernando Fernandez-Canque: Optimization of Reconfigurable Multi-core SOCs for Multi-standard Applications. KES (2) 2009: 515-522
	2008
36		Ali Ahmadinia, Balal Ahmad, Ahmet T. Erdogan, Tughrul Arslan: SystemC-based Custom Reconfigurable Cores for Wireless Applications. ERSA 2008: 169-175
35		Ali Ahmadinia, Balal Ahmad, Tughrul Arslan: Communication Centric Modelling of System on Chip Devices Targeting Multi-standard Telecommunication Applications. ISVLSI 2008: 209-214
34		Ali Ahmadinia, Balal Ahmad, Tughrul Arslan: Efficient High-Level Power Estimation for Multi-standard Wireless Systems. ISVLSI 2008: 275-280
33		Sándor P. Fekete, Jan van der Veen, Ali Ahmadinia, Diana Göhringer, Mateusz Majer, Jürgen Teich: Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device. IEEE Trans. VLSI Syst. 16(9): 1210-1219 (2008)
	2007
32		Ali Ahmadinia, Balal Ahmad, Tughrul Arslan: System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design. AHS 2007: 169-175
31		Balal Ahmad, Ali Ahmadinia, Tughrul Arslan: Hybrid Communication Medium for Adaptive SoC Architectures. AHS 2007: 373-378
30		Ali Ahmadinia, Balal Ahmad, Ahmet T. Erdogan, Tughrul Arslan: System-level Modelling and Analysis of Embedded Reconfigurable Cores for Wireless Systems. FPL 2007: 757-760
29		Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan: Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform. ISCAS 2007: 1875-1878
28		Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan: Power evaluation of the arbitration policy for different on-chip bus based SoC platform. SoCC 2007: 159-162
27		Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan: Power estimation framework for single processor based SoC platform. SoCC 2007: 173-176
26		Ali Ahmadinia: Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices. IEEE Trans. Computers 56(5): 673-680 (2007)
25		Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda: The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer. VLSI Signal Processing 47(1): 15-31 (2007)
	2006
24		Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Jürgen Teich: A Flexible Reconfiguration Manager for the Erlangen Slot Machine. ARCS Workshops 2006: 183-194
23		Ali Ahmadinia: Optimization algorithms for dynamically reconfigurable embedded systems. University of Erlangen-Nuremberg 2006: 1-221
	2005
22		Christophe Bobda, Ali Ahmadinia, Kurapati Rajesham, Mateusz Majer, Adronis Niyonkuru: Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs. ARCS Workshops 2005: 61-66
21		Jan van der Veen, Sándor P. Fekete, Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich: Defragmenting the Module Layout of a Partially Reconfigurable Device. ERSA 2005: 92-104
20		Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform. FCCM 2005: 319-320
19		Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices. FPL 2005: 153-158
18		Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich: The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms. FPT 2005: 37-42
17		Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices. IEEE International Workshop on Rapid System Prototyping 2005: 84-90
16		Mateusz Majer, Christophe Bobda, Ali Ahmadinia, Jürgen Teich: Packet Routing in Dynamically Changing Networks on Chip. IPDPS 2005
15		Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices CoRR abs/cs/0503066: (2005)
14		Jan van der Veen, Sándor P. Fekete, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich: Defragmenting the Module Layout of a Partially Reconfigurable Device CoRR abs/cs/0505005: (2005)
13		Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices CoRR abs/cs/0510039: (2005)
12		Christophe Bobda, Ali Ahmadinia: Dynamic Interconnection of Reconfigurable Modules on Reconfigurable Devices. IEEE Design & Test of Computers 22(5): 443-451 (2005)
11		Ali Ahmadinia, Christophe Bobda, Jürgen Teich: Online placement for dynamically reconfigurable devices. IJES 1(3/4): 165-178 (2005)
	2004
10		Ali Ahmadinia, Christophe Bobda, Jürgen Teich: A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware. ARCS 2004: 125-139
9		Christophe Bobda, Ali Ahmadinia, Jürgen Teich: Generation of Distributed Arithmetic Designs for Reconfigurable Application. ARCS Workshops 2004: 205-214
8		Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich: A Dynamic NoC Approach for Communication in Reconfigurable Devices. FPL 2004: 1032-1036
7		Ali Ahmadinia: Optimization Algorithms for Dynamic Reconfigurable Embedded Systems p. FPL 2004: 1168
6		Ali Ahmadinia, Christophe Bobda, Sándor P. Fekete, Jürgen Teich, Jan van der Veen: Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices. FPL 2004: 847-851
5		Ali Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich: A New Approach for On-line Placement on Reconfigurable Devices. IPDPS 2004
4		Ali Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich: Real-Time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration. IPDPS 2004
3		Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich: Task scheduling for heterogeneous reconfigurable computers. SBCCI 2004: 22-27
2		Ali Ahmadinia, Christophe Bobda, Sándor P. Fekete, Jürgen Teich, Jan van der Veen: Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices CoRR cs.DS/0406035: (2004)
	2003
1		Ali Ahmadinia, Jürgen Teich: Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead. VLSI-SOC 2003: 118-122

Coauthor Index

1	Michael Opoku Agyeman	[42] [46]
2	Balal Ahmad	[30] [31] [32] [34] [35] [36] [39]
3	Josef Angermeier	[40]
4	Tughrul Arslan	[27] [28] [29] [30] [31] [32] [34] [35] [36] [37] [39]
5	Marcus Bednara	[4] [5]
6	Christophe Bobda	[2] [3] [4] [5] [6] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [24] [25]
7	Doris Csipkes	[47]
8	Gabor Csipkes	[47]
9	Ji Ding	[15] [17]
10	Ahmet T. Erdogan	[27] [28] [29] [30] [36]
11	Sándor P. Fekete	[2] [6] [13] [14] [15] [17] [19] [20] [21] [33] [40]
12	Hernando Fernandez-Canque	[37] [38] [43] [47] [48] [49]
13	John Freer	[38]
14	Diana Göhringer	[33]
15	Thomas Haller	[18] [20]
16	Frank Hannig	[14] [21]
17	Sorin Hintea	[38] [47]
18	Tom Kamphans (Thomas Kamphans)	[40]
19	Dirk Koch	[3] [8] [40]
20	André Linarth	[18] [20]
21	Mateusz Majer	[3] [8] [13] [15] [16] [17] [18] [19] [20] [21] [22] [24] [25] [33] [40]
22	Adronis Niyonkuru	[22]
23	Kurapati Rajesham	[22]
24	Roberto Ramirez-Iniguez	[47] [48] [49]
25	Nils Schweer	[40]
26	Alireza Shahrabi (Ali Shahrabi)	[41] [44] [45]
27	Prakash Srinivasan	[27] [28] [29]
28	Jürgen Teich	[1] [2] [3] [4] [5] [6] [8] [9] [10] [11] [13] [14] [15] [16] [17] [18] [19] [20] [21] [24] [25] [33] [40]
29	Christopher Tessars	[40]
30	Jan van der Veen	[2] [6] [13] [14] [15] [17] [19] [20] [21] [33] [40]

Colors in the list of coauthors

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