E. N. Aghdam

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2006

1 E. N. Aghdam, Philippe Bénabès: A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz. ISCAS 2006

	2006
1		E. N. Aghdam, Philippe Bénabès: A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz. ISCAS 2006

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