 | 2011 |
| 11 |  | Allon Adir,
Amir Nahir,
Gil Shurek,
Avi Ziv,
Charles Meissner,
John Schumann:
Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor.
DAC 2011: 569-574 |
| 10 |  | Allon Adir,
Maxim Golubev,
Shimon Landa,
Amir Nahir,
Gil Shurek,
Vitali Sokhin,
Avi Ziv:
Threadmill: a post-silicon exerciser for multi-threaded processors.
DAC 2011: 860-865 |
| 9 |  | Allon Adir,
Shady Copty,
Shimon Landa,
Amir Nahir,
Gil Shurek,
Avi Ziv,
Charles Meissner,
John Schumann:
A unified methodology for pre-silicon verification and post-silicon validation.
DATE 2011: 1590-1595 |
| 2010 |
| 8 |  | John M. Ludden,
Michal Rimon,
Bryan G. Hickerson,
Allon Adir:
Advances in Simultaneous Multithreading Testcase Generation Methods.
Haifa Verification Conference 2010: 146-160 |
| 7 |  | Allon Adir,
Amir Nahir,
Avi Ziv,
Charles Meissner,
John Schumann:
Reaching Coverage Closure in Post-silicon Validation.
Haifa Verification Conference 2010: 60-75 |
| 2007 |
| 6 |  | Allon Adir,
Sigal Asaf,
Laurent Fournier,
Itai Jaeger,
Ofer Peled:
A Framework for the Validation of Processor Architecture Compliance.
DAC 2007: 902-905 |
| 2005 |
| 5 |  | Allon Adir,
Hezi Azatchi,
Eyal Bin,
Ofer Peled,
Kirill Shoikhet:
A generic micro-architectural test plan approach for microprocessor verification.
DAC 2005: 769-774 |
| 4 |  | Allon Adir,
Yaron Arbetman,
Bella Dubrov,
Yossi Lichtenstein,
Michal Rimon,
Michael Vinov,
Massimo A. Calligaro,
Andrew Cofler,
Gabriel Duffy:
VLIW: a case study of parallelism verification.
DAC 2005: 779-782 |
| 2004 |
| 3 |  | Allon Adir,
Eli Almog,
Laurent Fournier,
Eitan Marcus,
Michal Rimon,
Michael Vinov,
Avi Ziv:
Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification.
IEEE Design & Test of Computers 21(2): 84-93 (2004) |
| 2003 |
| 2 |  | Allon Adir,
Roy Emek,
Yoav Katz,
Anatoly Koyfman:
DeepTrans - A Model-based Approach to Functional Verification of Address Translation Mechanisms.
MTV 2003: 3-6 |
| 1 |  | Allon Adir,
Hagit Attiya,
Gil Shurek:
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture.
IEEE Trans. Parallel Distrib. Syst. 14(5): 502-515 (2003) |