Trio Adiono

	2011
7		Ardimas Andi Purwita, Arnaud Setio, Trio Adiono: Optimized 8-level turbo encoder algorithm and VLSI architecture for LTE. ICEEI 2011: 1-6
6		Rachmad Vidya Wicaksana Putra, Rella Mareta, Nurfitri Anbarsanti, Trio Adiono: The efficient mCBE algorithm and quantization numbers for multiplierless and low complexity DCT/IDCT Image Compression Architecture. ICEEI 2011: 1-6
5		Savitri Galih, Trio Adiono, Adit Kurniawan, Iskandar: Folding Memory Shared Processor Array (FMSPA) Architecture for Channel Estimation of Downlink OFDMA IEEE 802.16e System. PARELEC 2011: 173-178
	2005
4		Trio Adiono, Dani Fitriyanto, Akhmad Mulyanto, Sumek Wisayataksin, Kazumasa Takeichi, Dongju Li, Tati Rajab Mengko, Hiroaki Kunieda: New Macroblock Engine Architecture for Video Processing. MVA 2005: 68-71
	2001
3		Tsuyoshi Isshiki, Chawalit Honsawek, Trio Adiono, Kazuhito Ito, Tomohiko Ohtsuka, Dongju Li, Hiroaki Kunieda: H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method. ISAS-SCI (1) 2001: 195-200
	1998
2		Tati Rajab Mengko, Trio Adiono, Handoko Setyawan, Rini Setiadarma, Donny A. Hudiansyah: Design and Implementation of Real Time System for Object Detection and Classification on Parallel Virtual Machine. MVA 1998: 535-538
	1996
1		Yudi Yanuhardi, Trio Adiono, Tati Rajab Mengko: TMP5X5T1M: A Configurable Binary Morphological and Template Matching Processor. MVA 1996: 174-177

Coauthor Index

1	Nurfitri Anbarsanti	[6]
2	Dani Fitriyanto	[4]
3	Savitri Galih	[5]
4	Chawalit Honsawek	[3]
5	Donny A. Hudiansyah	[2]
6	Iskandar	[5]
7	Tsuyoshi Isshiki	[3]
8	Kazuhito Ito	[3]
9	Hiroaki Kunieda	[3] [4]
10	Adit Kurniawan	[5]
11	Dongju Li	[3] [4]
12	Rella Mareta	[6]
13	Tati Rajab Mengko	[1] [2] [4]
14	Akhmad Mulyanto	[4]
15	Tomohiko Ohtsuka	[3]
16	Ardimas Andi Purwita	[7]
17	Rachmad Vidya Wicaksana Putra	[6]
18	Rini Setiadarma	[2]
19	Arnaud Setio	[7]
20	Handoko Setyawan	[2]
21	Kazumasa Takeichi	[4]
22	Sumek Wisayataksin	[4]
23	Yudi Yanuhardi	[1]

Colors in the list of coauthors

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