 | 2011 |
| 14 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Deepak Gupta,
Michel Jézéquel:
Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture.
Signal Processing Systems 64(1): 17-29 (2011) |
| 2010 |
| 13 |  | Patrick Adde,
Christophe Jégo,
Raphaël Le Bidan,
Jorge Ernesto Pérez Chamorro:
Design and implementation of a soft-decision decoder for Cortex codes.
ICECS 2010: 663-666 |
| 12 |  | Sylvie Kerouédan,
Makram Touzri,
Patrick Adde,
Samir Saoudi:
A Turbo Decoder Included in a Multi-User Detector: A Solution to be Retained.
IJCNS 3(10): 826-834 (2010) |
| 2009 |
| 11 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping.
Signal Processing Systems 57(3): 349-361 (2009) |
| 2008 |
| 10 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel,
Deepak Gupta:
A highly parallel Turbo Product Code decoder without interleaving resource.
SiPS 2008: 1-6 |
| 9 |  | Raphaël Le Bidan,
Camille Leroux,
Christophe Jégo,
Patrick Adde,
Ramesh Pyndiah:
Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design.
EURASIP J. Wireless Comm. and Networking 2008: (2008) |
| 2007 |
| 8 |  | Raphaël Le Bidan,
Ramesh Pyndiah,
Patrick Adde:
Some Results on the Binary Minimum Distance of Reed-Solomon Codes and Block Turbo Codes.
ICC 2007: 990-994 |
| 7 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
Towards Gb/s turbo decoding of product code onto an FPGA device.
ISCAS 2007: 909-912 |
| 2006 |
| 6 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Raphaël Le Bidan,
Michel Jézéquel:
Efficient architecture for Reed Solomon block turbo code.
ISCAS 2006 |
| 5 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes.
ISVLSI 2006: 430-431 |
| 4 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding.
ReCoSoC 2006: 152-159 |
| 3 |  | Javier Cuevas,
Patrick Adde,
Sylvie Kerouédan:
Information Theory Turbo decoding of product codes for Gigabit per second applications and beyond.
European Transactions on Telecommunications 17(1): 45-55 (2006) |
| 2001 |
| 2 |  | Sylvie Kerouédan,
Patrick Adde,
Ramesh Pyndiah:
How we implemented block turbo codes?
Annales des Télécommunications 56(7-8): 447-454 (2001) |
| 1999 |
| 1 |  | Patrick Adde,
Ramesh Pyndiah,
Fabien Buda:
Design and performance of a product code turbo encoding-decoding prototype.
Annales des Télécommunications 54(3-4): 214-219 (1999) |