 | 2012 |
| 20 |  | Tayler H. Hetherington,
Timothy G. Rogers,
Lisa Hsu,
Mike O'Connor,
Tor M. Aamodt:
Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems.
ISPASS 2012: 88-98 |
| 2011 |
| 19 |  | Wilson W. L. Fung,
Tor M. Aamodt:
Thread block compaction for efficient SIMT control flow.
HPCA 2011: 25-36 |
| 18 |  | Wilson W. L. Fung,
Inderpreet Singh,
Andrew Brownsword,
Tor M. Aamodt:
Hardware transactional memory for GPU architectures.
MICRO 2011: 296-307 |
| 17 |  | Xi E. Chen,
Tor M. Aamodt:
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs.
TACO 8(3): 10 (2011) |
| 2010 |
| 16 |  | Aaron Ariel,
Wilson W. L. Fung,
Andrew E. Turner,
Tor M. Aamodt:
Visualizing complex dynamics in many-core accelerator architectures.
ISPASS 2010: 164-174 |
| 15 |  | Johnny J. W. Kuan,
Steven J. E. Wilton,
Tor M. Aamodt:
Accelerating trace computation in post-silicon debug.
ISQED 2010: 244-249 |
| 14 |  | Ali Bakhoda,
John Kim,
Tor M. Aamodt:
Throughput-Effective On-Chip Networks for Manycore Accelerators.
MICRO 2010: 421-432 |
| 13 |  | Ali Bakhoda,
John Kim,
Tor M. Aamodt:
On-chip network design considerations for compute accelerators.
PACT 2010: 535-536 |
| 2009 |
| 12 |  | Xi E. Chen,
Tor M. Aamodt:
A first-order fine-grained multithreaded throughput model.
HPCA 2009: 329-340 |
| 11 |  | Ali Bakhoda,
George L. Yuan,
Wilson W. L. Fung,
Henry Wong,
Tor M. Aamodt:
Analyzing CUDA workloads using a detailed GPU simulator.
ISPASS 2009: 163-174 |
| 10 |  | George L. Yuan,
Ali Bakhoda,
Tor M. Aamodt:
Complexity effective memory access scheduling for many-core accelerator architectures.
MICRO 2009: 34-44 |
| 9 |  | Wilson W. L. Fung,
Ivan Sham,
George L. Yuan,
Tor M. Aamodt:
Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware.
TACO 6(2): (2009) |
| 2008 |
| 8 |  | Xi E. Chen,
Tor M. Aamodt:
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs.
MICRO 2008: 59-70 |
| 7 |  | Henry Wong,
Anne Bracy,
Ethan Schuchman,
Tor M. Aamodt,
Jamison D. Collins,
Perry H. Wang,
Gautham N. Chinya,
Ankur Khandelwal Groen,
Hong Jiang,
Hong Wang:
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor.
PACT 2008: 52-61 |
| 6 |  | Tor M. Aamodt,
Paul Chow:
Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy.
ACM Trans. Embedded Comput. Syst. 7(3): (2008) |
| 2007 |
| 5 |  | Tor M. Aamodt,
Paul Chow:
Optimization of data prefetch helper threads with path-expression based statistical modeling.
ICS 2007: 210-221 |
| 4 |  | Wilson W. L. Fung,
Ivan Sham,
George L. Yuan,
Tor M. Aamodt:
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow.
MICRO 2007: 407-420 |
| 2004 |
| 3 |  | Tor M. Aamodt,
Paul Chow,
Per Hammarlund,
Hong Wang,
John Paul Shen:
Hardware Support for Prescient Instruction Prefetch.
HPCA 2004: 84-95 |
| 2003 |
| 2 |  | Tor M. Aamodt,
Pedro Marcuello,
Paul Chow,
Antonio González,
Per Hammarlund,
Hong Wang,
John Paul Shen:
A framework for modeling and optimization of prescient instruction prefetch.
SIGMETRICS 2003: 13-24 |
| 2000 |
| 1 |  | Tor M. Aamodt,
Paul Chow:
Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation.
CASES 2000: 128-137 |