 | 2011 |
| 19 |  | Bushra Ahsan,
Lorena Ndreu,
Isidoros Sideris,
Yiannakis Sazeides,
Sachin Idgunji,
Emre Özer:
Eliminating energy of same-content-cell-columns of on-chip SRAM arrays.
ISLPED 2011: 181-186 |
| 2009 |
| 18 |  | Mrinmoy Ghosh,
Emre Özer,
Simon Ford,
Stuart Biles,
Hsien-Hsin S. Lee:
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches.
ISLPED 2009: 165-170 |
| 2008 |
| 17 |  | Emre Özer,
Ronald G. Dreslinski,
Trevor N. Mudge,
Stuart Biles,
Krisztián Flautner:
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor.
SAMOS 2008: 12-22 |
| 16 |  | Emre Özer,
Andy Nisbet,
David Gregg:
A stochastic bitwidth estimation technique for compact and low-power custom processors.
ACM Trans. Embedded Comput. Syst. 7(3): (2008) |
| 2007 |
| 15 |  | Emre Özer,
Stuart Biles:
Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor.
Asia-Pacific Computer Systems Architecture Conference 2007: 376-386 |
| 14 |  | Emre Özer,
Alastair Reid,
Stuart Biles:
Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor.
SBAC-PAD 2007: 37-44 |
| 2006 |
| 13 |  | Mrinmoy Ghosh,
Emre Özer,
Stuart Biles,
Hsien-Hsin S. Lee:
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter.
ARCS 2006: 283-297 |
| 12 |  | Dong Hyuk Woo,
Mrinmoy Ghosh,
Emre Özer,
Stuart Biles,
Hsien-Hsin S. Lee:
Reducing energy of virtual cache synonym lookup using bloom filters.
CASES 2006: 179-189 |
| 11 |  | Yunhe Shi,
Emre Özer,
David Gregg:
Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors.
ISCIS 2006: 248-257 |
| 2005 |
| 10 |  | Owen Callanan,
Andy Nisbet,
Emre Özer,
James Sexton,
David Gregg:
FPGA Implementation of a Lattice Quantum Chromodynamics Algorithm Using Logarithmic Arithmetic.
IPDPS 2005 |
| 9 |  | Emre Özer,
Resit Sendag,
David Gregg:
Multiple-Valued Caches for Power-Efficient Embedded Systems.
ISMVL 2005: 126-131 |
| 8 |  | Emre Özer,
Andy Nisbet,
David Gregg,
Owen Callanan:
Estimating data bus size for custom processors in embedded systems.
Design Autom. for Emb. Sys. 10(1): 5-26 (2005) |
| 7 |  | Emre Özer,
Thomas M. Conte:
High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm.
IEEE Trans. Parallel Distrib. Syst. 16(12): 1132-1142 (2005) |
| 2004 |
| 6 |  | Emre Özer,
Andy Nisbet,
David Gregg:
Stochastic Bit-Width Approximation Using Extreme Value Theory for Customizable Processors.
CC 2004: 250-264 |
| 5 |  | Emre Özer,
Andy Nisbet,
David Gregg:
Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques.
Euro-Par 2004: 318-327 |
| 4 |  | Emre Özer,
Andy Nisbet,
David Gregg:
Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs.
FCCM 2004: 273-274 |
| 2001 |
| 3 |  | Emre Özer,
Thomas M. Conte,
Saurabh Sharma:
Weld: A Multithreading Technique Towards Latency-Tolerant VLIW Processors.
HiPC 2001: 192-203 |
| 1998 |
| 2 |  | Emre Özer,
Sumedh W. Sathaye,
Kishore N. Menezes,
Sanjeev Banerjia,
Matthew D. Jennings,
Thomas M. Conte:
A Fast Interrupt Handling Scheme for VLIW Processors.
IEEE PACT 1998: 136-141 |
| 1 |  | Emre Özer,
Sanjeev Banerjia,
Thomas M. Conte:
Unified Assign and Schedule: A New Approach to Scheduling for Clustered Register File Microarchitectures.
MICRO 1998: 308-315 |