8. VLSI Design 1995: New Delhi, India

1 - Routing I

2 - Hardware-Software Design

3 - Sequential Automatic Test Pattern Generation

4 - Field Programmable Gate Arrays

5 - High-Level Synthesis

6-Combinational Automatic Test Pattern Generation

7--Logic Synthesis and Retiming

8-VLSI Arithmetic I

9 - Delay Test

10 - Chip Design

11 - Tools and Technology Posters

12 - Panel: India in the VLSI World - High-Tech Innovator or Body Shop?

14 - Routing II

15 - Image Compression

16 - Analog Circuit Test

17 - Synthesis and Verification

18 - VLSI Technology/CAD

19 - Testability

20 - Low-Power/Analog Design

21 - Array Processor Design

22 - Diagnosis and Self-Checking

23 - Floorplanning and Partitioning

24 - VLSI Arithmetic II

25 - Design and Synthesis for Testability

maintained by Schloss Dagstuhl LZI at University of Trier