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ORCID1. TPCD 1992: Nijmegen, The Netherlands
- Victoria Stavridou, Thomas F. Melham, Raymond T. Boute:
Theorem Provers in Circuit Design, Proceedings of the IFIP TC10/WG 10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice and Experience, Nijmegen, The Netherlands, 22-24 June 1992, Proceedings. IFIP Transactions A-10, North-Holland 1992, ISBN 0-444-89686-4
Research Papers
- Bishop Brock, Warren A. Hunt Jr., William D. Young:
Introduction to a Formally Defined Hardware Description Language. TPCD 1992: 3-35 - Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man:
A Description Methodology for Parameterized Modules in the Boyer-Moore Logic. TPCD 1992: 37-57 - Tiziana Margaria:
Hierarchical Mixed-Mode Verification of Complex FSMs Described at the RT Level. TPCD 1992: 59-75 - Keith Hanna, Neil Daeche, Gareth Howells:
Implementation of the Veritas Design Logic. TPCD 1992: 77-94 - Hans Henrik Løvengreen, Jørgen Staunstrup:
Synchronous Realization of Asynchronous Computations. TPCD 1992: 95-110 - D. J. Kinniment, Albert Koelmans:
Modelling and Verification of Timing Conditions with the Boyer Moore Prover. TPCD 1992: 111-127 - Richard J. Boulton, Andrew D. Gordon, Michael J. C. Gordon, John Harrison, John Herbert, John Van Tassel:
Experience with Embedding Hardware Description Languages in HOL. TPCD 1992: 129-156 - John Herbert:
Incremental Design and Formal Verification of Microcoded Microporcessors. TPCD 1992: 157-174 - Holger Busch:
Transformational Design in a Theorem Prover. TPCD 1992: 175-196 - Victoria Stavridou, Joseph A. Goguen, Andrew Stevens, Steven M. Eker, Serge N. Aloneftis, Keith Michael Hobley:
FUNNEL and 2OBJ: Towards an Integrated Hardware Design Environment. TPCD 1992: 197-223 - Mark Bickford, Mandayam K. Srivas:
Verification of a Fault-Tolerant Property of a Multiprocessor System: A Case Study in Theorem Prover-Based Verification. TPCD 1992: 225-251 - Simon Bainbridge, Albert John Camilleri, Roger Fleming:
Theorem Proving as an Industrial Tool for System Level Desgin. TPCD 1992: 253-274
Tutorial Papers
- Jørgen Staunstrup, Stephen J. Garland, John V. Guttag:
Mechanized Verification of Circuit Descriptions Using the Larch Prover. TPCD 1992: 277-299 - Keith Hanna, Neil Daeche:
The Veritas Design Logic: A User's View. TPCD 1992: 301-310 - Paul B. Jackson:
Nuprl and Its Use in Circuit Design. TPCD 1992: 311-336 - Beth Levy, Ivan Filippenko, Leo Marcus, Telis Menas:
Using the State Delta Verification System (SDVS) for Hardware Verification. TPCD 1992: 337-360
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