SoCC 2007:
Tampere, Finland
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Chu Yu ,
Hwai-Tsu Hu :
A compact pipelined architecture with high-throughput for context-based binary arithmetic coding.
33-36
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conf/socc/MarshallCXPKASSMMPR07 Andrew Marshall ,
C. Rinn Cleavelin ,
Weize Xiong ,
Christian Pacha ,
Gerhard Knoblinger ,
Klaus Von Armin ,
Thomas Schulz ,
Klaus Schruefer ,
Ken Matthews ,
Wolfgang Molzer ,
Paul Patruno ,
Christian Russ :
A merged MuGFET and planar SOI process.
39-42
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Minoru Watanabe :
An 11, 424 gate-count zero-overhead dynamic optically reconfigurable gate array VLSI.
75-78
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Mingzhen Wang ,
Chien-In Henry Chen :
Low-power 1.25-GHZ signal bandwidth 4-bit CMOS analog-to-digital converter for high spurious-free dynamic range wideband communications.
109-112
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Yuan Sun ,
Liter Siek :
A spur-reduction technique in a fully integrated CMOS frequency synthesizer for 5-GHz WLAN SOC.
113-116
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conf/socc/WisayataksinLIK07 export record as
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Junghee Lee ,
Joonhwan Yi :
Industrial experience with cycle error computation of cycle-accurate transaction level models.
155-158
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conf/socc/SrinivasanAEA07 export record as
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Kaijian Shi ,
Jingsong Li :
A wakeup rush current and charge-up time analysis method for programmable power-gating designs.
163-165
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conf/socc/SrinivasanAEA07a export record as
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conf/socc/WeerasekeraZPT07 export record as
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conf/socc/AtitallahPNMD07 export record as
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conf/socc/LiouHWTWMCHDCLC07 Jing-Jia Liou ,
Chih-Tsun Huang ,
Cheng-Wen Wu ,
Ching-Cheng Tien ,
Chi-Hu Wang ,
Hsi-Pin Ma ,
Ying-Yen Chen ,
Yueh-Chih Hsu ,
Li-Ming Denq ,
Chien-Jung Chiu ,
Young-Wey Li ,
Chieh-Ming Chang :
A prototype of a wireless-based test system.
225-228
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