3. SLIP 2001: Rohnert Park, CA, USA

@proceedings{DBLP:conf/slip/2001,
  title     = {The Third IEEE/ACM International Workshop on System-Level Interconnect
               Prediction (SLIP 2001), March 31 - April 1, 2001, DoubleTree
               Hotel, Rohnert Park, CA, USA, Proceedings},
  booktitle = {SLIP},
  publisher = {ACM},
  year      = {2001},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

• Dirk Stroobandt:
  A priori system-level interconnect prediction: Rent's rule and wire length distribution models. 3-21
  
• Xiaojian Yang, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
  Wirelength estimation based on rent exponents of partitioning and placement. 25-31
  
• Peter Verplaetse, Joni Dambre, Dirk Stroobandt, Jan Van Campenhout:
  On partitioning vs. placement rent properties. 33-40
  
• Dirk Stoobandt:
  Multi-terminal nets do change conventional wire length distribution models. 41-48
  
• Joni Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout:
  On rent's rule for rectangular regions. 49-56
  
• Ralph H. J. M. Otten, Giuseppe S. Garcea:
  Are wires plannable? 59-66
  
• Kenneth Rose:
  A comprehensive look at system level model. 69-87
  
• Kenneth D. Boese, Andrew B. Kahng, Stefanus Mantik:
  On the relevance of wire load models. 91-98
  
• Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu:
  Interconnect implications of growth-based structural models for VLSI circuits. 99-106
  
• Arifur Rahman, Shamik Das, Anantha Chandrakasan, Rafael Reif:
  Wiring requirement and three-dimensional integration of field-programmable gate arrays. 107-113
  
• Ganapathy Parthasarathy, Malgorzata Marek-Sadowska, Arindam Mukherjee, Amit Singh:
  Interconnect complexity-aware FPGA placement using Rent's rule. 115-121
  
• Michael D. Hutton:
  Interconnect prediction for programmable logic devices. 125-131
  
• José Pineda de Gyvez:
  Yield modeling and BEOL fundamentals. 135-163
  
• Phillip Christie, José Pineda de Gyvez:
  Pre-layout prediction of interconnect manufacturability. 167-173
  
• James D. Z. Ma, Lei He:
  Simultaneous signal and power routing under K model. 175-182
  
• Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
  Hierarchical power supply noise evaluation for early power grid design prediction. 183-188
  
• Shih-Hsu Huang:
  An effective low power design methodology based on interconnect prediction. 189-194
  
• André DeHon:
  Rent's rule based switching requirements. 197-204
  

Last update Fri May 25 08:39:45 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page