Compilation and optimization

• 
  Jens Brandt, Klaus Schneider: Separate compilation for synchronous programs. 1-10
• 
  Paul Lokuciejewski, Fatih Gedikli, Peter Marwedel: Accelerating WCET-driven optimizations by the invariant path paradigm: a case study of loop unswitching. 11-20
• 
  David Ryan Koes, Seth Copen Goldstein: Register allocation deconstructed. 21-30

Keynote talk

• 
  Reinhard Wilhelm: The PROMPT design principles for predictable multi-core architectures. 31-32

Domain-specific languages

• 
  Florian Kluge, Chenglong Yu, Jörg Mische, Sascha Uhrig, Theo Ungerer: Implementing AUTOSAR scheduling and resource management on an embedded SMT processor. 33-42
• 
  Andreas Dahlin, Johan Ersfolk, Guyfu Yang, Haitham Habli, Johan Lilius: The canals language and its compiler. 43-52
• 
  Edson Lisboa, Luciano Silva, Igino Chaves, Thiago Lima, Edna Barros: A design flow based on a domain specific language to concurrent development of device drivers and device controller simulation models. 53-60

Validation and verification

• 
  Jan Olaf Blech, Michaël Périn: Certifying deadlock-freedom for BIP models. 61-70
• 
  Florian Brandner: Precise simulation of interrupts using a rollback mechanism. 71-80

last updated on Sat May 18 05:32:42 2013 by the dblp team
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