Optimization and code generation for embedded processors

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  Xiaoyan Jia, Jie Guo, Gerhard Fettweis: Integrated code generation by using fuzzy control system. 1-10
• 
  Mattias V. Eriksson, Oskar Skoog, Christoph W. Kessler: Optimal vs. heuristic integrated code generation for clustered VLIW architectures. 11-20
• 
  Paul Lokuciejewski, Heiko Falk, Peter Marwedel, Henrik Theiling: WCET-driven, code-size critical procedure cloning. 21-30

Keynote talk

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  Koen De Bosschere: Memory footprint reduction for embedded systems. 31

Memory- and addressing-aware compilation

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  Tjerk Bijlsma, Marco Bekooij, Pierre G. Jansen, Gerard J. M. Smit: Communication between nested loop programs via circular buffers in an embedded multiprocessor system. 33-42
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  Alastair Colin Murray, Björn Franke: Fast source-level data assignment to dual memory banks. 43-52
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  Hesham S. Ali, Hatem M. El-Boghdadi, Samir I. Shaheen: A new heuristic for SOA problem based on effective tie break function. 53-59

Validation and simulation

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  Hugo Venturini, Frédéric Riss, Jean-Claude Fernandez, Miguel Santana: A fully-non-transparent approach to the code location problem. 61-68
• 
  Björn Franke: Fast cycle-approximate instruction set simulation. 69-78

last updated on Fri May 24 05:26:09 2013 by the dblp team
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