SBCCI 2004:
Pernambuco,
Brazil
Edna Natividade da Silva Barros, Flávio Rech Wagner, Luigi Carro, Franz-Josef Rammig (Eds.):
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004.
ACM 2004
Tutorials
Partial reconfigurable architectures
- Ewerson Carvalho, Ney Calazans, Eduardo Wenzel Brião, Fernando Moraes:
PaDReH: a framework for the design and implementation of dynamically and partially reconfigurable systems.
10-15
- Paulo Sérgio B. do Nascimento, Paulo Romero Martins Maciel, Manoel Eusebio de Lima, Remy Eskinazi Sant'Anna, Abel Guilhermino S. Filho:
A partial reconfigurable architecture for controllers based on Petri nets.
16-21
- Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich:
Task scheduling for heterogeneous reconfigurable computers.
22-27
- Michael Hübner, Tobias Becker, Jürgen Becker:
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration.
28-32
Analog design
Verification (co-organized with LA-TTTC)
- Fernando Cortez Sica, Claudionor José Nunes Coelho Jr., José Augusto Miranda Nacif, Harry Foster, Antônio Otávio Fernandes:
Exception handling in microprocessors using assertion libraries.
55-59
- Ghiath Al Sammane, Julien Schmaltz, Diana Toma, Pierre Ostier, Dominique Borrione:
TheoSim: combining symbolic simulation and theorem proving for hardware verification.
60-65
- Karina R. G. da Silva, Elmar U. K. Melcher, Guido Araujo, Valdiney Alves Pimenta:
An automatic testbench generation tool for a SystemC functional verification methodology.
66-70
- Fulvio Corno, Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante:
A multi-level approach to the dependability analysis of networked systems based on the CAN protocol.
71-75
RF design
Test (co-organized with LA-TTTC)
Physical modeling and analysis
Applications of reconfigurable architectures
- Klaus Danne:
Distributed arithmetic FPGA design with online scalable size and performance.
135-140
- Alexander Thomas, Thomas Zander, Jürgen Becker:
Adaptive DMA-based I/O interfaces for data stream handling in multi-grained reconfigurable hardware architectures.
141-146
Low-power analog design
Embedded systems
- Antonio Carlos Schneider Beck, Luigi Carro:
A VLIW low power Java processor for embedded applications.
157-162
- Raimundo S. Barreto, Marília Neves, Meuse N. Oliveira Jr., Paulo Romero Martins Maciel, Eduardo Tavares, Ricardo Massa Ferreira Lima:
A formal software synthesis approach for embedded hard real-time systems.
163-168
- Leandro Buss Becker, Marco A. Wehrmeister, Carlos Eduardo Pereira:
Power and performance tuning in the synthesis of real-time scheduling algorithms for embedded applications.
169-174
- Márcio Oyamada, Felipe Zschornack, Flávio Rech Wagner:
Accurate software performance estimation using domain classification and neural networks.
175-180
Dedicated circuits
Networks-on-chip
Mixed analog-digital design
Design methods
Logic and physical CAD
Low-power gate design
Last update Wed Feb 15 05:16:38 2012
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