41. MICRO 2008:
Lake Como, Italy Keynote 1
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Instruction-Level Parallelism
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David E. Shaw :
Architectures and algorithms for millisecond-scale molecular dynamics simulations of proteins.
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conf/micro/GonzalezGVRCV08 export record as
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conf/micro/RobatmiliCBM08
Cache Coherence and Cache Modeling
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Cache Architectures for Security and Availability
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conf/micro/AggarwalSSJR08 export record as
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Reliability, Availability, Security
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conf/micro/GreathouseWRBABP08 export record as
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Embedded and Special Purpose Architectures
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conf/micro/WohLSMMCBKRWF08 Mark Woh ,
Yuan Lin ,
Sangwon Seo ,
Scott A. Mahlke ,
Trevor N. Mudge ,
Chaitali Chakrabarti ,
Richard Bruce ,
Danny Kershaw ,
Alastair Reid ,
Mladen Wilder ,
Krisztián Flautner :
From SODA to scotch: The evolution of a wireless baseband processor.
152-163
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conf/micro/GovindarajuDSVM08 export record as
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Memory and Cache Architectures
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Transactions and Runtime Systems
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Modeling, Simulation and Verification
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conf/micro/ConstantinidesMA08 export record as
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conf/micro/ShachamWSFRH08
Multicore and Multithreading
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Interconnects
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conf/micro/ChangCKLNPRST08
Process Variation
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Circuits and Microarchitectures
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Wangyuan Zhang ,
Tao Li :
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology.
435-446
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conf/micro/DreslinskiCMBSF08
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