8. MEMOCODE 2010: Grenoble, France

• Klaus Schneider, Barbara Jobstmann, Luca P. Carloni, Jens Brandt:
  Message from the chairs. 1-3
  

Invited Talk 1

• Rupak Majumdar, Indranil Saha, Zilong Wang:
  Systematic testing for control applications. 1-10
  

Design and Design Methodologies

• Nirav Dave, Man Cheuk Ng, Michael Pellauer, Arvind:
  A design flow based on modular refinement. 11-20
  
• David J. Greaves, Satnam Singh:
  Designing application specific circuits with concurrent C# programs. 21-30
  

Verification Techniques

• Bryan A. Brady, Randal E. Bryant, Sanjit A. Seshia, John W. O'Leary:
  ATLAS: Automatic Term-level abstraction of RTL designs. 31-40
  
• Roberto Bruttomesso, Edgar Pek, Natasha Sharygina:
  A flexible schema for generating explanations in lazy theory propagation. 41-48
  
• Franjo Ivancic, Malay K. Ganai, Sriram Sankaranarayanan, Aarti Gupta:
  Numerical stability analysis of floating-point computations using software model checking. 49-58
  
• Tevfik Bultan, Fang Yu, Aysu Betin-Can:
  Modular verification of synchronization with reentrant locks. 59-68
  

Design Contest

• Michael Pellauer, Abhinav Agarwal, Asif Khan, Man Cheuk Ng, Muralidaran Vijayaraghavan, Forrest Brewer, Joel S. Emer:
  Design contest overview: Combined architecture for network stream categorization and intrusion detection (CANSCID). 69-72
  
• Hiroshi Nakahara, Tsutomu Sasao, Munehiro Matsuura:
  A regular expression matching using non-deterministic finite automaton. 73-76
  
• Sunil Shukla, Rodric M. Rabbah, Martin Vorbach:
  FPGA-based combined architecture for stream categorization and intrusion detection. 77-80
  
• Mohammad Hassan Khabbazian, Hassan Eslami, Ehsan Totoni, AmadReza Khadem:
  High-throughput stream categorization and intrusion detection on GPU. 81-84
  
• Oleg Medvedev, Ilya Posov:
  Using hardware-software codesign language to implement CANSCID. 85-88
  
• Adarsha Rao, Pramod Udupa:
  A hardware accelerated system for deep packet inspection. 89-92
  
• Velacheri Jagadeesan Sananda:
  A high throughput parallel architecture for category specific Deep Packet Inspection. 93-94
  
• Michael Steffen, Veerendra Allada, Phillip H. Jones, Joseph Zambreno:
  CANSCID-CUDA. 95-98
  
• Sudhanshu Vyas, Pooja Mhapsekar, Aditya Ashok, Moinuddin Sayed, Avinash Srinivasa, Gunjan Pandey, Adam Jackson, Matthew Nelson, Anand Saggi, Harini Sundararaman, Phillip H. Jones:
  Team [Ii][Ss][Uu][0-2]{4} design overview: MEMOCODE 2010 design contest. 99-102
  

Verification Methods for System C

• Laurence Pierre, Luca Ferro:
  Enhancing the assertion-based verification of TLM designs with reentrancy. 103-112
  
• Daniel Große, Hoang M. Le, Rolf Drechsler:
  Proving transaction and system-level properties of untimed SystemC TLM designs. 113-122
  
• Deian Tabakov, Moshe Y. Vardi:
  Monitoring temporal SystemC properties. 123-132
  

Tutorial 1

• Josef Haid, Christian Bachmann, Andreas Genser, Christian Steger, Reinhold Weiss:
  Power emulation: Methodology and applications for HW/SW power optimization. 133-138
  

Tutorial 2

• Alain Darte:
  Understanding loops: The influence of the decomposition of Karp, Miller, and Winograd. 139-148
  

Invited Talk 3

• Jordi Cortadella, Marc Galceran Oms, Michael Kishinevsky:
  Elastic systems. 149-158
  

Design Languages

• Sidharta Andalam, Partha S. Roop, Alain Girault:
  Predictable multithreading of embedded applications using PRET-C. 159-168
  
• Emil Axelsson, Koen Claessen, Gergely Dévai, Zoltán Horváth, Karin Keijzer, Bo Lyckegård, Anders Persson, Mary Sheeran, Josef Svenningsson, András Vajda:
  Feldspar: A domain specific language for digital signal processing algorithms. 169-178
  
• Patrick O'Neil Meredith, Michael Katelman, José Meseguer, Grigore Rosu:
  A formal executable semantics of Verilog. 179-188
  

Model Transformations and Tranformation Validation

• Bin Xue, Sandeep K. Shukla, S. S. Ravi:
  Minimizing back pressure for latency insensitive system synthesis. 189-198
  
• Julio C. Peralta, Thierry Gautier, Loïc Besnard, Paul Le Guernic:
  LTSs for translation validation of (multi-clocked) SIGNAL specifications. 199-208
  
• Mike Gemunde, Jens Brandt, Klaus Schneider:
  Compilation of imperative synchronous programs with refined clocks. 209-218
  

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