ITC 1984: Philadelphia, PA, USA

Session 1: Test Economics

Session 2: Update on Automatic Test Pattern Generation

Session 3: New Developments in Test System Accuracy

Session 4: Built-In Self Test Design and Analysis Techniques

Panel Session 5: Implications of Hardware Design Language

Session 6: Artificial Intelligence in VLSI Test Systems

Session 7: Printed Circult Board Manufacturing Process and Test Data Management

Session 8: Recent Developments in Computer Alded Testing

Session 9: Memory Test

Session 10: Stimulus Generation and Application for Built-In-Self Test

Session 11: Intergrated Circult Manufacturing Process and Test Data Management

Session 12: Physical Tralt Measurement on Components

Session 13: Analog and Hybrid Testing

Session 14: New Directions for VLSI Test Systems

Session 15: Systems Test

Session 16: How, Where, Why, and When of Lsi Burn-In

Session 17: Advanced Probing Techniques for VLSI Devices

Session 18: Advances In Board Test Techniques

Session 19: Software For Successful Test Systems

Session 20: VLSI Microprocessor Testing I

Session 21: Testability Analysis

Session 22: Test Program Generation Tools

Session 24: VLSI Microprocessor Testing II

Session 25: Design for Testability

maintained by Schloss Dagstuhl LZI at University of Trier