ITC 1984:
Philadelphia, PA, USASession 1: Test Economics
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Mark A. Myers :
DeltaI vs. DeltaY : A Quantitative Analysis of the Trade-offs Between Higher Capital Investment and Higher Yield in PCB Testing.
8-19
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Session 2: Update on Automatic Test Pattern Generation
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Erwin Trischler :
ATWIG, An Automatic Test Pattern Generator with Inherent Guidance.
80-87
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Session 3: New Developments in Test System Accuracy
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Alexander Holland :
High Resolution, High Linearity Interpolating A/D Converter.
96-104
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Session 4: Built-In Self Test Design and Analysis Techniques
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Panel Session 5: Implications of Hardware Design Language
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Bulent I. Dervisoglu :
On Coosing a Hardware Descriptive Language for Digital Systems Testing/Verification.
184-187
Session 6: Artificial Intelligence in VLSI Test Systems
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A. Jesse Wilkinson :
A Method for Test System Diagnostics Based on the Principles of Artificial Intelligence.
188-195
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Robert Mullis :
An Expert System for VLSI Tester Diagnostics.
196-199
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Session 7: Printed Circult Board Manufacturing Process and Test Data Management
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Brian C. Crosby :
Adapting CAE Design Information for In-Circuit Test Generation.
206-211
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Graeme R. Kinsey :
Information and Material Flow Within a Production Test Cell.
212-217
Session 8: Recent Developments in Computer Alded Testing
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Ramin Khorram :
Functional Test Pattern Generation for Integrated Circuits.
246-249
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Session 9: Memory Test
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John R. Day :
A Fault-Driven, Comprehensive Redundancy Algorithm for Repair of Dynamic RAMs.
287-293
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Session 10: Stimulus Generation and Application for Built-In-Self Test
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Session 11: Intergrated Circult Manufacturing Process and Test Data Management
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Dean Bandes :
Exploratory Data Analysis Makes Testing More Valuable for Semiconductor Manufacturing.
350-358
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Session 12: Physical Tralt Measurement on Components
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Session 13: Analog and Hybrid Testing
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E. A. Sloane :
Transfer Function Estimation Part I : Theoretical and Practical Considerations.
426-439
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Terence Lee :
In-Circuit Analog Component Testing at High Frequencies.
455-461
Session 14: New Directions for VLSI Test Systems
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Donald L. Wheater :
IBM's Cost Performance Array Tester Architecture for the 80's.
466-470
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Session 15: Systems Test
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R. F. Voitus :
PBX System Test: Fast Functional Testing Without System Assembly.
482-488
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Eric Sacher :
Component Level Fault-Isolation Techniques in a Systems Test Environment.
489-492
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James T. Healy :
An Information Processing Software System for ATE.
497-505
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Session 16: How, Where, Why, and When of Lsi Burn-In
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Michael J. Campbell :
Monitored Burn-In (A Case Study for In-Situ Testing and Reliability Studies).
518-523
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Session 17: Advanced Probing Techniques for VLSI Devices
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Francois J. Henley :
An Automated Laser Prober to Determine VLSI Internal Node Logic States.
536-542
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conf/itc/KuollenspergerKSWWW84
Session 18: Advances In Board Test Techniques
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Stephen P. Denker ,
Judy Cobb :
Automatic Visual Testing: A New, Comprehensive Element of Cost-Effective PCB Testing Strategies.
558-563
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Stephen R. Teta :
Using a Synchronous High-Speed Sensor System to Diagnose Microprocessor Boards.
564-571
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Stephen Caplow :
Conquering Testability Problems by Combining In-Circuit and Functional Techniques.
581-588
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conf/itc/BalasubramaniamF84
Session 19: Software For Successful Test Systems
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Terence King :
Advanced Test System Software Architecture Blends High Speed with User Friendliness.
606-613
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Session 20: VLSI Microprocessor Testing I
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Session 21: Testability Analysis
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Prabhakar Goel :
Testability Analysis will not Replace Fault Simulation.
722-724
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F. C. Wang :
Testability Analysis: What Role Should it Play in IC Design ?
725-727
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Session 22: Test Program Generation Tools
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Steve Broyles :
Automating Functional Programming for Micro-Based Boards.
730-736
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Peter Hansen :
A Multimode Programming Strategy for VLSI Boards.
737-742
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Herb Boulton :
Design Verification, Product Characterization and Production Testing of Hybrids and Printed Circuit Cards Using High-Sensitivity Thermography Systems.
747-751
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Edward S. Hirgelt :
Knowledge Representation in an In-Circuit Test Program Generator.
773-777
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A. J. Kombol :
Processing of Test Data between Design and Testing.
789-793
Session 24: VLSI Microprocessor Testing II
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Session 25: Design for Testability
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Alfred K. Susskind :
A Technique for Making Asynchronous Sequential Circuits Readily Testable.
842-846
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Jon Turino :
A Totally Universal Reset, Initialization (and) Nodal Observation Circuit.
878-884
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