ISQED 2000:
San Jose, California, USAEvening Panel Discussion
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Plenary Session
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John East :
The Practical Side of Quality.
25-26
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John Kibarian :
Ramping New IC Products in the Deep Submicron Age.
29-
Panel Discussion
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DSM Modeling
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Emerging Process and Device Technology
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Jiann S. Yuan :
Overview of SiGe Technology Modeling and Application.
67-72
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conf/isqed/WuFYCCOYLIKYK00 Lifeng Wu ,
Jingkun Fang ,
Heting Yan ,
Ping Chen ,
Alvin I-Hsien Chen ,
Yoshifumi Okamoto ,
Chune-Sin Yeh ,
Zhihong Liu ,
Nobufusa Iwanishi ,
Norio Koike ,
Hirokazu Yonezawa ,
Yoshiyuki Kawakami :
GLACIER: A Hot Carrier Gate Level Circuit Characterization and Simulation System for VLSI Design.
73-80
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Quality of Design and EDA Tools
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conf/isqed/Ben-YaacovBS00 export record as
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Betty Prince :
Quality Memory Blocks -- Balancing the Trade-Offs.
109-114
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conf/isqed/FontanelliABM00
Emerging Integrity Issues
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conf/isqed/ShimazakiTKH00 export record as
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conf/isqed/GrazianoDMPZ00
Low Power Test
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Patrick Girard :
Low Power Testing of VLSI Circuits: Problems and Solutions.
173-180
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Evening Panel Discussion
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Plenary Session
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conf/isqed/Sangiovanni-Vincentelli00 export record as
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Kamran Eshraghian :
Deep Submicron USLI Design Paradigm: Who is Writing the Future?
213-
Quality of IP Blocks
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Tomás Bautista ,
Antonio Núñez :
Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells.
217-226
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Impact of Emerging Processes on Design Quality
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Ashok K. Sinha :
Extending Moore's Law through Advances in Semiconductor Manufacturing Equipment.
243-244
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Poster Session
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Donald J. Dent :
Project Management for System-on-Chip Using Multi-Chip Modules.
283-290
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conf/isqed/HaniotakisTNE00 export record as
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Wieslaw Kuzmicz :
Internet-Based Virtual Manufacturing: A Verification Tool for IC Designs.
315-320
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Rong Lin :
A Reconfigurable Low-Power High-Performance Matrix Multiplier Design.
321-328
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Mehdi M. Mechaik :
Electrical Characterization of Signal Routability and Performance.
329-336
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Panel Discussion
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Quality Definitions and Metrics
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Einar J. Aas :
Design Quality and Design Efficiency; Definitions, Metrics and Relevant Design Experiences.
389-394
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Michael Keating :
Measuring Design Quality by Measuring Design Complexity.
103-
Low Power Design and Test
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Takayasu Sakurai :
Reducing Power Consumption of CMOS VLSI's through VDD and VTH Control.
417-424
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Panel Discussion
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Design for Manufacturability
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conf/isqed/AxelradCODDGSBB00 export record as
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Mehdi M. Mechaik :
Effects of Package Stackups on Microprocessor Performance.
475-
VDSM Capacitive and Inductive Issues
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conf/isqed/AingaranKKAMYMD00 export record as
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conf/isqed/FranziniFPSF00 export record as
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