25. ISMVL 1995:
Bloomington, Indiana, USA http:
//computer.org/proceedings/ismvl/7118/7118toc.htm
VLSI
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M. Ryu ,
Michitaka Kameyama :
Design of a Highly Parallel Multiple-Valued Linear Digital System for k-Ary Operations Based on Extended Representation Matrices.
20-
Logic Design I
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Circuit Design I
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K. Wayne Current :
Memory Circuits for Multiple-Valued Logic Voltage Signals.
52-57
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Keivan Navi ,
Daniel Etiemble :
From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators.
58-63
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Algebra I
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Boris A. Romov :
Completeness Theory for Vector Partial Multiple-Valued Logic Functions.
86-
Device-Based Circuit and Testing I
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Logic I
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Zuoquan Lin :
Paraconsistent Circumscription: First-Order Case.
112-116
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Invited Address
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Takao Waho :
Resonant Tunneling Transistor and Its Application to Multiple-Valued Logic Circuits.
130-
Fuzzy Logic
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Helmut Thiele :
On the Mutual Definability of Fuzzy Tolerance Relations and Fuzzy Tolerance Coverings.
140-145
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N. Schmechel :
On Lattice-Isomorphism Between Fuzzy Equivalence Relations and Fuzzy Partitions.
146-151
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Logic Design II
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Device-Based Circuit and Testing II
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Hao Tang ,
Hung Chang Lin :
A Fuzzy Membership Function Circuit Using Hysteretic Resonant Tunneling Diodes.
182-186
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Algebra II
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Hajime Machida :
Finitary Approximations and Metric Structure of the Space of Clones.
200-205
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Circuit Design II
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Logic II
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Invited Address
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Tadeusz Luba :
Decomposition of Multiple-Valued Functions.
256-
Artificial Intelligence
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Seiki Akama :
Three-Valued Constructive Logic and Logic Programs.
276-
Logic Design III
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